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TSB43AB21 Datasheet(PDF) 24 Page - Texas Instruments |
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TSB43AB21 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 109 page ![]() 3–3 3.1 PCI Configuration Registers The TSB43AB21 device is a single-function PCI device. The configuration header is compliant with the PCI Local Bus Specification as a standard header. Table 3–2 illustrates the PCI configuration header that includes both the predefined portion of the configuration space and the user-definable registers. Table 3–2. PCI Configuration Register Map REGISTER NAME OFFSET Device ID Vendor ID 00h Status Command 04h Class code Revision ID 08h BIST Header type Latency timer Cache line size 0Ch OHCI base address 10h TI extension base address 14h CardBus CIS base address 18h Reserved 1Ch–27h CardBus CIS pointer 28h Subsystem ID Subsystem vendor ID 2Ch Reserved 30h Reserved PCI power management capabilities pointer 34h Reserved 38h Maximum latency Minimum grant Interrupt pin Interrupt line 3Ch OHCI control 40h Power management capabilities Next item pointer Capability ID 44h PM data PMCSR_BSE Power management control and status 48h Reserved 4Ch–EBh PCI PHY control ECh Miscellaneous configuration F0h Link enhancement control F4h Subsystem device ID alias Subsystem vendor ID alias F8h GPIO3 GPIO2 Reserved FCh 3.2 Vendor ID Register The vendor ID register contains a value allocated by the PCI SIG and identifies the manufacturer of the PCI device. The vendor ID assigned to Texas Instruments is 104Ch. Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Vendor ID Type R R R R R R R R R R R R R R R R Default 0 0 0 1 0 0 0 0 0 1 0 0 1 1 0 0 Register: Vendor ID Offset: 00h Type: Read-only Default: 104Ch |
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