TLE9832 datasheet(32/94 Pages) INFINEON

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TLE9832

Functional Description

Data Sheet

Rev. 1.1, 2012-03-08

3.8

Interrupt System

The TLE9832 supports 14 interrupt vectors with four priority levels. Eleven of these interrupt vectors are assigned

to the on-chip peripherals: Timer 0, Timer 1, UART, SSC and A/D Converter are each assigned to one dedicated

interrupt vector; while Timer2, Timer21, MDU, LIN and the Capture/Compare Unit share six interrupt vectors.

Two interrupt vectors are assigned to the external interrupts. External interrupts 0 to 1 are each assigned to one

dedicated interrupt vector, external interrupt 2 shares on interrupt vector with Timer21 and the MDU.

One interrupt vector is dedicated to the XINT interrupt events whose interrupt flags are also located in registers in

XSFR area.

A non-maskable interrupt (NMI) with the highest priority is shared by the following:

•

Watchdog Timer, warning before overflow

•

MI_CLK Watchdog Timer overflow event

•

PLL, loss of lock

•

Flash, on operation complete, e.g. erase.

•

OCDS, on user IRAM event

•

Oscillator watchdog detection for too low oscillation of

OSC

•

Flash map error

•

Uncorrectable ECC error on Flash, XRAM and IRAM

•

VSUP supply pre warning when any supply voltage drops below or exceeds any threshold.

Figure 14, Figure 15, Figure 16, Figure 17 and Figure 18 give a general overview of the interrupt sources and

nodes, and their corresponding control and status flags. Figure 19 gives the corresponding overview for the NMI

sources.

TLE9832 Datasheet(PDF) 32 Page - Infineon Technologies AG