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TLE9832 Datasheet(PDF) 83 Page - Infineon Technologies AG |
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TLE9832 Datasheet(HTML) 83 Page - Infineon Technologies AG |
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83 / 94 page ![]() TLE9832 Electrical Characteristics Data Sheet 83 Rev. 1.1, 2012-03-08 5.9.2 Analog/Digital Converter Parameters These parameters describe the conditions for optimum ADC performance. Note: Operating Conditions apply. Table 36 A/D Converter Characteristics V S = 5.5 V to 27 V, Tj = -40° C to +150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. Analog reference supply V AREFSR V AGND + 1.0 – V DDPA + 0.05 V 1) P_5.9.7 Analog reference ground V AGNDSR GND - 0.05 –1.5 V 2) P_5.9.8 Analog input voltage range V AIN V AGND – V AREF V 3) P_5.9.9 Analog clock frequency f ADCI 0.5 – 20 MHz 4) P_5.9.10 Conversion time for 10-bit result5) t C10 (13 + STC) × t ADCI + 2 x t SYS (13 + STC) × t ADCI + 2 x t SYS (13 + STC) × t ADCI + 2 x t SYS – – P_5.9.11 Conversion time for 8-bit result t C8 (11 + STC) × t ADCI + 2 × t SYS (11 + STC) × t ADCI + 2 × t SYS (11 + STC) × t ADCI + 2 × t SYS – – P_5.9.12 Wake-up time from analog Stop Mode, fast mode t WAF ––4 µs 6) P_5.9.13 Wake-up time from analog Stop Mode, slow mode t WAS ––15 µs 6) P_5.9.14 Total unadjusted error7) TUE -15 – + 15 LSB 1) V AREF = 5.0 V±1% P_5.9.15 DNL error EADNLEA -2 – + 2 LSB – P_5.9.16 INL error EAINLEA -5 – + 5 LSB – P_5.9.17 Gain error EAGAINEA -10 – + 10 LSB – P_5.9.18 Offset error EAOFFEA -2 – + 2 LSB – P_5.9.19 Total capacitance of an analog input C AINT ––10 pF 6)8) P_5.9.20 Switched capacitance of an analog input C AINS ––4 pF 6)8) P_5.9.21 Resistance of the analog input path R AIN ––2 kΩ 6)8) P_5.9.22 Total capacitance of the reference input C AREFT ––15 pF 6)8) P_5.9.23 Switched capacitance of the reference input C AREFS ––7 pF 6)8) P_5.9.24 Resistance of the reference input path R AREF ––2 kΩ 6)8) P_5.9.25 |
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