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DS2155 Datasheet(PDF) 182 Page - Dallas Semiconductor

Part # DS2155
Description  T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
PDF  262 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2155 Datasheet(HTML) 182 Page - Dallas Semiconductor

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DS2156
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Register Name:
U_TPCL
Register Description:
UTOPIA Transmit PMON Counter Latch Register
Register Address:
51h
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
—
—
—
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/The host should always write 0x00 to this register when latching the PMON counter.
This register is provided for latching in the 16-bit transmit assigned cell-count value of a port into the common
transmit assigned cell-counter latch register. For reading the transmit assigned cell-count value, software writes
into this register and then reads from transmit-assigned cell-counter MSB and LSB registers. A write into this
register clears the transmit-assigned cell-count value.
Register Name:
U_TACC1
Register Description:
UTOPIA Transmit-Assigned Cell-Count Register 1
Register Address:
52h
Bit #
7
6
5
4
3
2
1
0
Name
TACC15
TACC14
TACC13
TACC12
TACC11
TACC10
TACC9
TACC8
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Transmit-Assigned Cell Count (TACC9 to TACC15)
Register Name:
U_TACC2
Register Description:
UTOPIA Transmit-Assigned Cell-Count Register 2
Register Address:
53h
Bit #
7
6
5
4
3
2
1
0
Name
TACC7
TACC6
TACC5
TACC4
TACC3
TACC2
TACC1
TACC0
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Transmit-Assigned Cell Count (TACC0 to TACC7)
Transmit-assigned cell-count value reflects the number of ATM layer cells transmitted since last latching. For
reading the 16-bit transmit-assigned cell count for a port, software has to write into the transmit PMON-counter
latch-enable register for the port before reading these registers. Reading from these registers without writing into
the latch-enable register returns the old value that was latched and not the current MSB value.



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