DS2155 datasheet(188/262 Pages) DALLAS

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DS2156

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U_RACC1

UTOPIA Receive-Assigned Cell Count Register 1

66h

Bit #

Name

RACC15

RACC14

RACC13

RACC12

RACC11

RACC10

RACC9

RACC8

Default

Bits0 to 7/Receive-Assigned Cell Count 8 to 15 (RACC8 to RACC15)

U_RACC2

UTOPIA Receive-Assigned Cell Count Register 2

67h

Bit #

Name

RACC7

RACC6

RACC5

RACC4

RACC3

RACC2

RACC1

RACC0

Default

Bits 0 to 7/Receive-Assigned Cell Count 0 to 7 (RACC0 to RACC7)

The U_RACC1 and U_RACC2 registers are common registers for all ports. For software convenience, any of the

eight addresses can be used to access these registers. For reading the 16-bit receive assigned cell count for a port,

software has to write into the receive PMON-counter latch-enable register for the port before reading from these

registers. Reading from these registers without writing into the latch-enable register returns the old value that was

latched and not the current value of the receive-assigned cell count of a port. The assigned cell count value reflects

the number of cells written into receive FIFO that can be read by the ATM layer since last latching. Note that

whether or not the ATM layer dequeues cells from the receive FIFO, the assigned cell counter of a port is

incremented upon the reception of a valid ATM layer cell when cell delineation is in SYNC state.

DS2155 Datasheet(PDF) 188 Page - Dallas Semiconductor