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DS2155 Datasheet(PDF) 187 Page - Dallas Semiconductor |
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DS2155 Datasheet(HTML) 187 Page - Dallas Semiconductor |
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187 / 262 page ![]() DS2156 187 of 262 Register Name: U_RCHEC Register Description: UTOPIA Receive Correctable HEC Counter Register Register Address: 63h Bit # 7 6 5 4 3 2 1 0 Name RCHC7 RCHC6 RCHC5 RCHC4 RCHC3 RCHC2 RCHC1 RCHC0 Default 0 0 0 0 0 0 0 0 Bits 0 to 7/Receive Correctable HEC Counter (RCHC0 to RCHC7) Note that write access to the receive PMON-counter latch-enable register latches all receive PMON-counter values into temporary latch registers and clears the internal count values. This register holds the number of correctable HEC-errored cells received since last latching. Note that this count corresponds to cells received when cell delineation is in SYNC. A correctable HEC-errored cell is a cell with a single-bit error, provided single-bit HEC- error correction is enabled through U_RCR1.1 and the receiver mode of operation is in correction mode. Correctable HEC count value is unaffected if HEC-error correction is disabled. Register Name: U_RUHEC1 Register Description: UTOPIA Receive Uncorrectable HEC Counter Register 1 Register Address: 64h Bit # 7 6 5 4 3 2 1 0 Name — — — — RUHC11 RUHC10 RUHC9 RUHC8 Default 0 0 0 0 0 0 0 0 Bits 0 to 3/Receive Uncorrectable HEC Counter (RUHC8 to RUHC11) Bits 4 to 7/Unused Register Name: U_RUHEC2 Register Description: UTOPIA Receive Uncorrectable HEC Counter Register 2 Register Address: 65h Bit # 7 6 5 4 3 2 1 0 Name RUHC7 RUHC6 RUHC5 RUHC4 RUHC3 RUHC2 RUHC1 RUHC0 Default 0 0 0 0 0 0 0 0 Bits 0 to 7/Receive Uncorrectable HEC Counter (RUHC0 to RUHC7) The U_RUHEC1 and U_RUHEC2 registers count the number of uncorrectable HEC-errored cells received since last latching. Note that this count corresponds to cells received when cell delineation is in SYNC. For every SYNC- to-HUNT transition of the cell delineation state machine, the “Correctable + Uncorrectable” error-count value increases by 6 instead of 7. For every SYNC-to-HUNT transition, if HEC correction is enabled, the correctable HEC count increases by 1 and the uncorrectable HEC count increases by 5. If HEC correction is disabled, correctable HEC count is not affected and uncorrectable HEC count increases by 6. Note that cell delineation goes to HUNT state upon the reception of the 7th consecutive HEC pattern. Receive PMON counters are not updated when cell delineation is out of SYNC state. Note that write access to the receive PMON-counter latch-enable register latches internal receive PMON-counter values and clears them once they are latched. |
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