MCP19124 datasheet(108/236 Pages) MICROCHIP

108 / 236 page

MCP19124/5

DS20005619A-page 108

 2016 Microchip Technology Inc.

17.1.3

ANSELA REGISTER

The ANSELA register is used to configure the input

mode of an I/O pin to analog. Setting the appropriate

ANSELA bit high will cause all digital reads on the pin

to be read as ‘0’ and allow analog functions on the pin

to operate correctly.

The state of the ANSELA bits has no effect on digital

output functions. A pin with TRISGPA cleared and

ANSELx set will still operate as a digital output, but the

input mode will be analog. This can cause unexpected

behavior

when

executing

read-modify-write

instructions on the affected port.

17.1.4

PORTGPA FUNCTIONS AND

OUTPUT PRIORITIES

Each PORTGPA pin is multiplexed with other functions.

The pins, their combined functions and their output

priorities are shown in Table 17-1. For additional

information, refer to the appropriate section in this data

sheet.

Pin GPA7 in the PORTGPA register is a true open-drain

pin with no connection back to VDD.

When multiple outputs are enabled, the actual pin

control goes to the peripheral with the highest priority.

Analog input functions, such as ADC, are not shown in

the priority lists. These inputs are active when the I/O

pin is set for Analog mode using the ANSELA register.

Digital output functions may control the pin when it is in

Analog mode with the priority shown in Table 17-1.

Note:

The ANSELA bits default to the Analog

mode after Reset. To use any pins as

digital general-purpose or peripheral

inputs, the corresponding ANSEL bits

must be initialized to ‘0’ by the user’s

software.

TABLE 17-1:

PORTGPA OUTPUT

PRIORITY

Pin Name

Function Priority (1)

GPA0

TEST_OUT

GPA1

CLKPIN

GPA2

T0CKI

INT

GPA3

GPA5

GPA5 (open-drain, input only)

MCLR

TEST_EN

GPA6

CCD

ICSPDAT

GPA7

GPA7 (open-drain output, ST

input)

SCL

Note 1: Output function priority listed from lowest

to highest.

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