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MCP19124 Datasheet(PDF) 114 Page - Microchip Technology

Part # MCP19124
Description  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
PDF  236 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP19124 Datasheet(HTML) 114 Page - Microchip Technology

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MCP19124/5
DS20005619A-page 114
 2016 Microchip Technology Inc.
REGISTER 17-8:
ANSELB: ANALOG SELECT GPB REGISTER
U-0
R/W-1
R/W-1
R/W-1
U-0
U-0
R/W-1
U-0
—
ANSB6 (1)
ANSB5 (1)
ANSB4 (1)
—
—
ANSB1
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n = Value at POR
‘1’
= Bit is set
‘0’
= Bit is cleared
bit 7
Unimplemented: Read as‘0’
bit 6-4
ANSB<6:4>: Analog Select GPA Register bits
1
= Analog input. Pin is assigned as analog input (2).
0
= Digital I/O. Pin is assigned to port or special function.
bit 3-2
Unimplemented: Read as ‘0’
bit 1
ANSB<1>: Analog Select GPA Register bit
1
= Analog input. Pin is assigned as analog input (2).
0
= Digital I/O. Pin is assigned to port or special function.
bit 0
Unimplemented: Read as‘0’
Note 1: MCP19125 only.
2: Setting a pin to an analog input automatically disables the digital input circuitry, weak pull-ups and
interrupt-on-change if available. The corresponding TRIS bit must be set to Input mode in order to allow
external control of the voltage on the pin.
TABLE 17-4:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTGPB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELB
—
ANSB6 (1) ANSB5 (1) ANSB4 (1)
—
—
ANSB1
—
114
OPTION_REG
RAPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
78
PORTGPB
GPB7 (1)
GPB6 (1)
GPB5 (1)
GPB4 (1)
—
—
GPB1
GPB0
112
TRISGPB
TRISB7 (1) TRISB6 (1)
TRISB5
(1)
TRISB4
(1)
—
—
TRISB1
TRISB0
113
WPUGPB
WPUB7 (1) WPUB6 (1)
WPUB5
(1)
WPUB4
(1)
—
—
WPUB1
—
113
Legend: — = unimplemented locations, read as ‘0’. Shaded cells are not used by the PORTGPB register.
Note 1: MCP19125 only.



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