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PM6344 Datasheet(PDF) 188 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 188 Page - PMC-Sierra, Inc |
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188 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 175 Register 04FH, 0CFH, 14FH, 1CFH: Line Code Violation Count MSB Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 R LCV[12] X Bit 3 R LCV[11] X Bit 2 R LCV[10] X Bit 1 R LCV[9] X Bit 0 R LCV[8] X These registers indicate the number of LCV error events that occurred during the previous accumulation interval. An LCV event is defined as the occurrence of a Bipolar Violation or Excessive Zeros. The counting of Excessive Zeros can be disabled by the BPV bit of the Receive Interface Configuration register. |
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