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PM6344 Datasheet(PDF) 250 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 250 Page - PMC-Sierra, Inc |
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250 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 237 Table 25 - Receive Data Link DMA Interface Output Timing (Figure 50) Symbol Description Min Max Units tPRINT Receive Data Register Serviced (RDB low) to RDLINT[x] Low Propagation Delay9,10 70 ns tPR1EOM Receive Data Register Serviced (RDB low) to RDLEOM[x] High Propagation Delay9,10 80 ns tPR2EOM Receive Status Register Serviced (RDB high) to RDLEOM[x] Low Propagation Delay9,10 50 ns Figure 50 - Receive Data Link DMA Interface Output Timing Diagram RDB RDLINT[x] PRINT t t PR1EOM t PR2EOM RDLEOM[x] Notes on Input Timing: 1. BTCLK[x] can be a jittered clock signal subject to the minimum and maximum instantaneous frequencies and duty cycles shown. |
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