LPC18S50 datasheet(104/151 Pages) NXP

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LPC18S50_S30_S10

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Product data sheet

Rev. 1 — 23 February 2015

104 of 151

NXP Semiconductors

LPC18S50/S30/S10

32-bit ARM Cortex-M3 microcontroller

11. Dynamic characteristics

11.1 Wake-up times

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

C), nominal supply

voltages.

[2]

Tcy(clk) = 1/CCLK with CCLK = CPU clock frequency.

11.2 External clock for oscillator in slave mode

Remark: The input voltage on the XTAL1/2 pins must be

 1.2 V (see Table 10). For

connecting the oscillator to the XTAL pins, also see Section 13.2 and Section 13.4.

[1]

Parameters are valid over operating temperature range unless otherwise specified.

Table 13.

Dynamic characteristic: Wake-up from Deep-sleep, Power-down, and Deep

power-down modes

Tamb = 40 C to +85 C

Symbol Parameter

Conditions

Min

Typ[1]

Max

Unit

twake

wake-up time from Sleep mode

[2] 3



Tcy(clk)

 T

cy(clk)

-ns

from Deep-sleep and

Power-down mode

s

from Deep power-down mode

250

s

after reset

250

s

Table 14.

Dynamic characteristic: external clock

Tamb = 40 C to +85 C; VDD(IO) over specified ranges.[1]

Symbol

Parameter

Min

Max

Unit

fosc

oscillator frequency

MHz

Tcy(clk)

clock cycle time

1000

tCHCX

clock HIGH time

Tcy(clk)  0.4

Tcy(clk)  0.6

tCLCX

clock LOW time

Tcy(clk)  0.4

Tcy(clk)  0.6

Fig 25. External clock timing (with an amplitude of at least Vi(RMS) = 200 mV)

tCLCX

tCHCX

Tcy(clk)

002aag698

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