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PC87306 Datasheet(PDF) 41 Page - National Semiconductor (TI) |
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PC87306 Datasheet(HTML) 41 Page - National Semiconductor (TI) |
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41 / 110 page ![]() 40 FDC Command Set Description (Continued) TABLE 4-8 Sector Size Selection Bytes per Number of Bytes Sector Code in Data Field 0 128 1 256 2 512 3 1024 4 2048 5 4096 6 8192 7 16384 The controller then starts the Data Separator and waits for the Data Separator to find the next sector Address Field The controller compares the Address Field ID information (track head sector bytes per sector) with the desired ID specified in the Command Phase If the sector ID bytes do not match then the controller waits for the Data Separator to find the next sector Address Field The ID comparison process repeats until the Data Separator finds a sector Ad- dress Field ID that matches that in the command bytes or until an error occurs Possible errors are 1 The mP aborted the command by writing to the FIFO If there is no disk in the drive the controller hangs up The m P must then take the controller out of this hung state by writing a byte to the FIFO This puts the controller into the Result Phase 2 Two index pulses were detected since the search began and no valid ID has been found If the track address ID differs the WT bit or BT bit (if the track address is FFh) is set in ST2 If the head sector or bytes per sector code did not match the ND bit is set in ST1 If the Address Field AM was never found the MA bit is set in ST1 3 The Address Field was found with a CRC error The CE bit is set in ST1 Once the desired sector Address Field is found the control- ler waits for the Data Separator to find the subsequent Data Field for that sector If the Data Field (normal or deleted) is not found within the expected time the controller terminates the operation and enters the Result Phase (MD is set in ST2) If a Deleted Data Mark is found and Skip Flag (SK) was set in the Opcode command byte the controller skips this sector and searches for the next sector Address Field as described above The effect of SK on the Read Data command is summarized in Table 4-9 Having found the Data Field the controller then transfers data bytes from the disk drive to the host (described in Section 53 Controller Phases) until the bytes per sector count has been reached or the host terminates the opera- tion (through TC end of track or implicitly through overrun) The controller then generates the CRC for the sector and compares this value with the CRC at the end of the Data Field Having finished reading the sector the controller continues reading the next logical sector unless one or more of the following termination conditions occurred 1 The DMA controller asserted TC The IC bits in ST0 are set to Normal Termination 2 The last sector address (of side 1 if MT was set) was equal to EOT The EOT bit in ST1 is set The IC bits in ST0 are set to Abnormal Termination This is the expect- ed condition during Non-DMA transfers 3 Overrun error The OR bit in ST1 is set The IC bits in ST0 are set to Abnormal Termination If the mP cannot service a transfer request in time the last correctly read byte is transferred 4 CRC error The CE bit in ST1 and the CD bit in ST2 are set The IC bits in ST0 are set to Abnormal Termination If Multi-Track Selector (MT) was set in the Opcode com- mand byte and the last sector of side 0 has been trans- ferred the controller then continues with side 1 Upon terminating the Execution Phase of the Read Data command the controller asserts IRQ6 indicating the begin- ning of the Result Phase The mP must then read the result bytes from the FIFO The values that are read back in the result bytes are shown in Table 4-10 If an error occurs the result bytes indicate the sector read when the error oc- curred Command Phase MT MFM SK 0 0 1 1 0 IPS X X X X HD DR1 DR0 Track Number Drive Head Number Sector Number Bytes per Sector End of Track Sector Number Intersector Gap Length Data Length Execution Phase Data read from disk drive is transferred to system via DMA or Non-DMA modes Result Phase Status Register 0 Status Register 1 Status Register 2 Track Number Head Number Sector Number Bytes per Sector 41 |
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