PC87306 datasheet(86/110 Pages) NSC

86 / 110 page

100 Keyboard Controller and Real-Time Clock (Continued)

Timer Interrupt

If the timer interrupt is enabled upon the timer overflow an

interrupt occurs It causes the program to perform a subrou-

tine call to program address 007h The interrupt is cleared

by this subroutine call The current Program Counter (PC)

and the upper 4 bits of the PSW is pushed into the stack

before the call occurs At the end of the timer interrupt serv-

ice routine an RETR instruction restores the PSW and the

PC Because the timer interrupt has a lower priority than the

IBF interrupt simultaneous IBF and timer interrupts cause

the timer interrupt to be pending It is served as soon as the

program returns from the IBF interrupt service routine

Input Buffer Full (IBF) Interrupt

If the lBF interrupt is enabled when there is a host write

operation to the keyboard controller (IOW e 0) an interrupt

occurs The processor saves the current Program Counter

and the upper 4 bits of the PSW into the stack and performs

a subroutine call to the program address 003h Upon enter-

ing the interrupt service routine further interrupts are held

off The interrupt is re-enabled upon the execution of the

RETR instruction

1017 Oscillator and Instruction Timing

The oscillator pin of the keyboard controller is X1 when bit

7 of KRR is 0 When bit 7 of KRR is 1 the Keyboard Con-

troller clock is SYSCLK

Figures 10-11 shows the connec-

tions for external clock configuration via the X1 pin

The oscillator clock is divided by 3 to generate the state

timing then is further divided down by 5 to generate the

instruction timing

(Figure 10-12) Hence each instruction cy-

cle consists of 5 states and 15 clock cycles

Most of the keyboard controller instructions require only one

instruction cycle The others require two cycles Refer to the

instruction set for details

TLC12379 – 57

FIGURE 10-11 External Clock Connection

102 REAL-TIME CLOCK FUNCTION

The RTC in the PC87306 is a low-power clock that provides

a time-of-day clock and 100-year calendar with alarm fea-

tures and battery operation Other features include three

maskable interrupt sources and 242 bytes of general pur-

pose RAM Valid RAM and time can be maintained through

the use of an external battery source It is software compati-

ble with the DS1287 and MC146818

1021 Memory Map

The RTC contains 14 time and control registers It also con-

tains 242 bytes of general purpose battery backed static

RAM in two banks RAMSEL is used to select the active

bank Refer to Table 10-2

1022 Bus Interface

The RTC function is mapped to IO locations 70h (index)

and 71h (data)

This decode is done internal to the

PC87306

1023 Time Generation

The Time Generation function divides the 32768 kHz from

the external clock pins (X1C X2C) down to a one Hertz

signal The divider chain is controlled by bits 6 – 4 of Control

fifteen taps from the divider chain to be used as a Periodic

Interrupt See Control Register A in the Control Register and

Interrupt section for divider configurations and rate selec-

tions

During divider reset (bits 6 – 4 of Control Register A e 11x)

the divider chain is reset to 0 An update will occur 500 ms

after the divider chain is activated into normal operational

mode (bits 6 – 4 of Control Register A e 010) The periodic

flag also becomes active 12 of the programmed value

when the divider chain is activated

Figure 10-13 represents the internal and external circuitry

that comprise the oscillator The oscillator input may be driv-

en from an external source If this is desired the input

should be driven rail to rail and be approximately a 50%

duty cycle The oscillator output should be open in this case

The external capacitor values should be chosen to provide

the manufacturer’s specified load capacitance for the crys-

tal when combined with the parasitic capacitance of the

trace socket and package which can vary from 0 pF to

8 pF The rule of thumb in choosing these capacitors is

CL e (C1 C2)(C1 a C2) a Cparasitic

C2 l C1

C1 can be trimmed to obtain the 327680 Hz

TLC12379 – 58

FIGURE 10-12 Instruction Cycle Timing

PC87306 Datasheet(PDF) 86 Page - National Semiconductor (TI)

PC87306 Datasheet(HTML) 86 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL