PC87306 datasheet(43/110 Pages) NSC

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40 FDC Command Set Description (Continued)

The controller first simulates the Motor On time for the se-

lected drive internally The user must turn on the drive motor

directly by enabling the appropriate drive and motor select

disk interface outputs with the Digital Output Register

(DOR) The Read ID command does not perform an implied

seek

After waiting the Motor On time the controller starts the

Data Separator and waits for the Data Separator to find the

next sector Address Field If an error condition occurs the

IC bits in ST0 are set to Abnormal Termination and the

controller enters the Result Phase Possible errors are

1 The mP aborted the command by writing to the FIFO If

there is no disk in the drive the controller hangs up The

P must then take the controller out of this hung state by

writing a byte to the FIFO This puts the controller into the

Result Phase

2 Two index pulses were detected since the search began

and no AM has been found If the Address Field AM was

never found the MA bit is set in ST1

Command Phase

MFM

XXXHDDR1

DR0

Execution Phase

Controller reads first ID Field header

bytes it can find and reports these bytes to the system in the

result bytes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

4112 Read A Track Command

The Read A Track command reads sectors in physical order

from the selected drive and makes the data available to the

host This command is similar to the Read Data command

with the following exceptions

1 The controller waits for the index pulse before searching

for a sector Address Field If the mP writes to the FIFO

before the index pulse the command enters the Result

Phase with the IC bits in ST0 set to Abnormal Termina-

tion

2 A comparison of the sector Address Field ID bytes will be

performed except for the sector number The internal

sector address is set to 1 and then incremented for each

successive sector read

3 If the Address Field ID comparison fails the controller

sets ND in ST1 but continues to read the sector If there

is a CRC error in the Address Field the controller sets CE

in ST1 but continues to read the sector

4 Multi-track and Skip operations are not allowed SK and

MT should be set to 0

5 If there is a CRC error in the Data Field the controller

sets CE in ST1 and CD in ST2 but continues reading

sectors

6 The controller reads a maximum of EOT physical sectors

There is no support for multi-track reads

Command Phase

MFM

IPS

DR1

DR0

Track Number

Drive Head Number

Sector Number

Bytes per Sector

End of Track Sector Number

Intersector Gap Length

Data Length

Execution Phase

Data read from disk drive is transferred

to system via DMA or non-DMA modes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

4113 Recalibrate Command

The Recalibrate command is very similar to the Seek com-

mand The controller sets the Present Track Register (PTR)

of the selected drive to zero It then steps the head of the

selected drive out until the TRK0 disk interface input signal

goes active or until the maximum number of step pulses

have been issued See Table 4-12 for the maximum recali-

brate step pulse values based on the R255 and ETR bits in

the Mode command If the number of tracks on the disk

drive exceeds the maximum number of recalibrate step

pulses another Recalibrate command may need to be is-

sued

TABLE 4-12 Maximum Recalibrate

Step Pulses Based on R255 and ETR

R255

ETR

Maximum Recalibrate

Step Pulses

85 (default)

255

3925

4095

PC87306 Datasheet(PDF) 43 Page - National Semiconductor (TI)

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