PC87306 datasheet(90/110 Pages) NSC

90 / 110 page

100 Keyboard Controller and Real-Time Clock (Continued)

Control Register B

SET

PIE

AIE

UIE

2412

DSE

bit

Bit 0

DSEDaylight Savings Enable

(ReadWrite)

1 Enables daylight savings Two conditions ap-

ply as follows

Daylight Savings Spring Time advances from

15959 to 30000 on the first Sunday in April

Daylight Savings Fall Time advances from

15959 to 10000 on the last Sunday in Octo-

ber

0 Disables the daylight savings feature

Reset has no effect on this bit

Bit 1

241224 or 12 Hour Mode

(ReadWrite)

1 Enables 24 hour format

0 Enables 12 hour format

Reset has no effect on this bit

Bit 2

DMData Mode

(ReadWrite)

1 Enables BINARY format

0 Enables BCD format

Reset has no effect on this bit

Bit 3

This bit is defined as ‘‘Square Wave Enable’’ by

the MC146818 and is not supported by the RTC

Cell This bit is always read as 0

Bit 4

UIEUpdate Ended Interrupt Enable

(ReadWrite)

1 Enables generation of the Update Ended in-

terrupt This interrupt is generated at the time

an update occurs

0 Disables generation of the Update Ended in-

terrupt

Reset forces this bit to 0

Note

It is recommended that the software clears bits 4–6 of

Control Register B and reads Control Register C after

reset

Bit 5

AIEAlarm Interrupt Enable

(ReadWrite)

1 Enables generation of the Alarm interrupt The

Alarm interrupt is generated immediately after

a time update in which the Seconds Minutes

and Hours time matches with their respective

alarm counterparts

0 Disables generation of the alarm interrupt

Reset forces this bit to 0

Note

It is recommended that the software clears bits 4–6 of

Control Register B and reads Control Register C after

reset

Bit 6

PIEPeriodic Interrupt Enable

(ReadWrite)

1 Enables generation of the Periodic interrupt

Bits 3 – 0 of Control Register A determine the

rate of the Periodic interrupt

0 Disables generation of the Periodic interrupt

Reset forces this bit to 0

Note

It is recommended that the software clears bits 4–6 of

Control Register B and reads Control Register C after

reset

Bit 7

SETSet mode

(ReadWrite)

1 The user copy of time is ‘‘frozen’’ allowing the

time registers to be accessed without regard

for an occurrence of an update

0 The timing updates occur normally

Reset has no effect on this bit

Control Register C

IRQF

bit

Bits 0 – 3

Reserved

(Always 0)

Bit 4

UFUpdate Ended Interrupt Flag

(Read Only)

1 When the time registers are updated This bit

is reset to 0 at the conclusion of a read from

this register Reset forces this bit to 0

Bit 5

AFAlarm Interrupt Flag

(Read Only)

1 When an alarm condition is detected This bit

is reset to 0 at the conclusion of a read from

this register Reset forces this bit to 0

Bit 6

PFPeriodic Interrupt Flag

(Read Only)

1 When a transition occurs on the selected tap

of the divider chain This bit is reset to 0 at

the conclusion of a read from this register

Reset forces this bit to 0

Bit 7

IRQFInterrupt Request Flag

(Read Only)

1 When bit pairs PIE and PF AIE and AF and

UIE and UF all equal 1 The IRQF bit mirrors

the value on the IRQZ output When lRQZ is

active (low) IRQF is 1 Reset forces this bit to

Control Register D

VRT0000000

bit

6543210

Bits 0 – 6 Reserved

(Always 0)

Bit 7

VRTValid RAM and Time

(Read Only)

1 This bit indicates that the contents of the RTC

are valid

0 This bit indicates that the battery source is low

and that the RTC data and RAM data are

questionable This bit is set to 1 at the conclu-

sion of a read from this register

PC87306 Datasheet(PDF) 90 Page - National Semiconductor (TI)

PC87306 Datasheet(HTML) 90 Page - National Semiconductor (TI)

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