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PC87306 Datasheet(PDF) 97 Page - National Semiconductor (TI) |
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PC87306 Datasheet(HTML) 97 Page - National Semiconductor (TI) |
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97 / 110 page ![]() 120 Electrical Characteristics (Continued) 1224 Baud Out Timing Symbol Parameter Conditions Min Max Units N Baud Divisor 1 65535 ns tBHD Baud Output Positive Edge Delay CLK e 24 MHz2 100 pF Load 56 ns tBLD Baud Output Negative Edge Delay CLK e 24 MHz2 100 pF Load 56 ns TLC12379 – 73 FIGURE 12-5 Baud Out Timing 1225 Transmitter Timing Symbol Parameter Min Max Units tIRTXW IRTX Pulse Width 16 ms BAUD OUT Cycles tHR Delay from WR (WR THR) to Reset IRQ 40 ns tIR Delay from RD (RD IIR) to Reset IRQ (THRE) 55 ns tIRS Delay from Initial IRQ Reset to Transmit Start 8 24 Baud Out Cycles tSI Delay from Initial Write to IRQ 16 24 Baud Out Cycles tSTI Delay from Start Bit to IRQ (THRE) 8 Baud Out Cycles TLC12379 – 74 Note 1 See Microprocessor Write cycle timing Figure 12-3 Note 2 See Microprocessor Read cycle timing Figure 12-2 FIGURE 12-6 Transmitter Timing 97 |
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