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M0519 Datasheet(PDF) 25 Page - List of Unclassifed Manufacturers |
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M0519 Datasheet(HTML) 25 Page - List of Unclassifed Manufacturers |
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25 / 69 page ![]() M0519 Nov. 02, 2016 Page 25 of 69 Rev 1.02 - 32 external interrupt inputs, each with four levels of priority - Dedicated Non-maskable Interrupt (NMI) input - Supports for both level-sensitive and pulse-sensitive interrupt lines - Supports Wake-up Interrupt Controller (WIC) and, providing Ultra-low Power Sleep mode Debug support - Four hardware breakpoints - Two watchpoints - Program Counter Sampling Register (PCSR) for non-intrusive code profiling - Single step and vector catch capabilities Bus interfaces: - Single 32-bit AMBA-3 AHB-Lite system interface that provides simple integration to all system peripherals and memory - Single 32-bit slave port that supports the DAP (Debug Access Port) |
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