M0519 datasheet(30/69 Pages) ETC2

30 / 69 page

M0519

Nov. 02, 2016

Page 30 of 69

Rev 1.02

6.2.5

System Timer (SysTick)

The Cortex

® -M0 includes an integrated system timer, SysTick, which provides a simple, 24-bit

clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The

counter can be used as a Real Time Operating System (RTOS) tick timer or as a simple counter.

When system timer is enabled, it will count down from the value in the SysTick Current Value

(SYST_RVR) on the next clock cycle, then decrement on subsequent clocks. When the counter

transitions to 0, the COUNTFLAG status bit is set. The COUNTFLAG bit clears on reads.

The SYST_CVR value is UNKNOWN on reset. Software should write to the register to clear it to 0

before enabling the feature. This ensures the timer will count from the SYST_RVR value rather

than an arbitrary value when it is enabled.

If the SYST_RVR is 0, the timer will be maintained with a current value of 0 after it is reloaded

with this value. This mechanism can be used to disable the feature independently from the timer

enable bit.

For more detailed information, please refer to th

e “ARM

® Cortex® -M0 Technical Reference

Manual” and “ARM

® v6-M Architecture Reference Manual”.

M0519 Datasheet(PDF) 30 Page - List of Unclassifed Manufacturers