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AD9690 Datasheet(PDF) 76 Page - Analog Devices |
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AD9690 Datasheet(HTML) 76 Page - Analog Devices |
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76 / 79 page ![]() Data Sheet AD9690 Rev. B | Page 75 of 78 Reg Addr (Hex) Register Name Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Notes 0x592 JESD204B HD and CF config HD value 0 = disabled 1 = enabled 0 0 Control words per frame clock cycle per link (CF) CF value = Register 0x592, Bits[4:0] 0x80 Read only 0x5A0 JESD204B CHKSUM 0 CHKSUM value for SERDOUT0±, Bits[7:0] 0x81 Read only 0x5A1 JESD204B CHKSUM 1 CHKSUM value for SERDOUT1±, Bits[7:0] 0x82 Read only 0x5A2 JESD204B CHKSUM 2 CHKSUM value for SERDOUT2±, Bits[7:0] 0x82 Read only 0x5A3 JESD204B CHKSUM 3 CHKSUM value for SERDOUT3±, Bits[7:0] 0x84 Read only 0x5B0 JESD204B lane power- down 1 SERD- OUT3± 0 = on 1 = off 1 SERD- OUT2± 0 = on 1 = off 1 SERD- OUT1± 0 = on 1 = off 1 SERD- OUT0± 0 = on 1 = off 0xAA 0x5B2 JESD204B lane SERDOUT0± assign X X X X 0 SERDOUT0± lane assignment 000 = Logical Lane 0 001 = Logical Lane 1 010 = Logical Lane 2 011 = Logical Lane 3 0x00 0x5B3 JESD204B lane SERDOUT1± assign X X X X 0 SERDOUT1± lane assignment 000 = Logical Lane 0 001 = Logical Lane 1 010 = Logical Lane 2 011 = Logical Lane 3 0x11 0x5B5 JESD204B lane SERDOUT2± assign X X X X 0 SERDOUT2± lane assignment 000 = Logical Lane 0 001 = Logical Lane 1 010 = Logical Lane 2 011 = Logical Lane 3 0x22 0x5B6 JESD204B lane SERDOUT3± assign X X X X 0 SERDOUT3± lane assignment 000 = Logical Lane 0 001 = Logical Lane 1 010 = Logical Lane 2 011 = Logical Lane 3 0x33 0x5BF JESD serializer drive adjust 0 0 0 0 Swing voltage 0000 = 237.5 mV 0001 = 250 mV 0010 = 262.5 mV 0011 = 275 mV 0100 = 287.5 mV 0101 = 300 mV 0110 = 312.5 mV 0111 = 325 mV 1000 = 337.5 mV 1001 = 350 mV 1010 = 362.5 mV 1011 = 375 mV 1100 = 387.5 mV 1101 = 400 mV 1110 = 412.5 mV 1111 = 425 mV 0x5C1 De-emphasis select 0 SERD- OUT3± 0 = disable 1 = enable 0 SERD- OUT2± 0 = disable 1 = enable 0 SERDOUT1± 0 = disable 1 = enable 0 SERDOUT0 ± 0 = disable 1 = enable 0x00 |
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