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Data Sheet

AD9690

Rev. B | Page 33 of 78

14-BIT CONVERTER RESOLUTION (N = 14)

TAIL

CONTROL

BIT

(CS = 1)

1-BIT

CONTROL

BIT

(CS = 1)

1 TAIL

BIT

SERIALIZED SIGNAL MONITOR

FRAME DATA

EXAMPLE

CONFIGURATION 1

(N' = 16, N = 15, CS = 1)

EXAMPLE

CONFIGURATION 2

(N' = 16, N = 14, CS = 1)

SERIALIZED SIGNAL MONITOR

FRAME DATA

16-BIT JESD204B SAMPLE SIZE (N' = 16)

S[13]

S[12]

S[11]

S[10]

S[9]

S[8]

S[7]

S[6]

S[5]

S[4]

S[3]

S[2]

S[1]

S[0]

CTRL

[BIT 2]

CTRL

[BIT 2]

S[14]

S[13]

S[12]

S[11]

S[10]

S[9]

S[8]

S[7]

S[6]

S[5]

S[4]

S[3]

S[2]

S[1]

S[0]

15-BIT CONVERTER RESOLUTION (N = 15)

16-BIT JESD204B SAMPLE SIZE (N' = 16)

Figure 85. Signal Monitor Control Bit Locations

25-BIT

FRAME

5-BIT IDLE

SUB-FRAME

(OPTIONAL)

5-BIT IDENTIFIER

SUB-FRAME

5-BIT DATA

MSB

SUB-FRAME

5-BIT DATA

SUB-FRAME

5-BIT DATA

SUB-FRAME

5-BIT DATA

LSB

SUB-FRAME

5-BIT SUB-FRAMES

P[] = PEAK MAGNITUDE VALUE

IDLE

START

P[0]

START

P[4]

P[3]

P[2]

P1]

START

P[8]

P[7]

P[6]

P5]

START

P[12]

P[11]

P[10]

P[9]

START

ID[3]

ID[2]

ID[1]

ID[0]

Figure 86. SPORT over JESD204B Signal Monitor Frame Data

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