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MFC2000 Datasheet(PDF) 250 Page - List of Unclassifed Manufacturers |
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MFC2000 Datasheet(HTML) 250 Page - List of Unclassifed Manufacturers |
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250 / 426 page ![]() MFC2000 Multifunctional Peripheral Controller 2000 Hardware Description 12-4 Conexant 100723A 12.1.2 Register Description Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: Vertical Printer Motor Pattern Register (VPMPattern) 01FF805D (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) Rst. Value xxh Read Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: Vertical Printer Motor Pattern Register (VPMPattern) 01FF805C VPMH[3] VPMH[2] VPMH[1] VPMH[0] VPMF[3] VPMF[2] VPMF[1] VPMF[0] Rst. Value 00h Read Value 00h For the full step excitation, the phase pattern VPM[3:0] (See Table 12-1 and Table 12-2) needs to be put into VPMF[3:0] of this VPMPattern register. Bit[7:4] of this register are ‘don’t care’. For the half step excitation, two adjacent phase patterns (See Table 12-3) need to be put into the VPMPattern register: VPM[3:0] at FP[x] column needs to be put into VPMF[3:0] and VPM[3:0] at HP[x] column needs to be put into VPMH[3:0]. The current output at PM[3:0] is VPMF[3:0]. Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: Step Clock Register (VPStepClk) 01FF8853 (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) Rst. Value xxh Read Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: Step Clock Register (VPStepClk) 01FF8852 (Not Used) (Not Used) (Not Used) bit 4 of the step clock divider bit 3 of the step clock divider bit 2 of the step clock divider bit 1 of the step clock divider bit 0 of the step clock divider Rst. Value xxx00000b Read Value 00h • STEPCLK = ICLK/(8 * (n+1)), n (bit[4:0] of the step clock divider): from 0 to 31 Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: Step Control Register (VPStepCtrl) 01FF8059 (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) Rst. Value xxh Read Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: Step Control Register (VPStepCtrl) 01FF8058 (Not Used) (Not Used) (Not Used) Vertical Print Motor Power Control Stepping Mode 0: full step 1: half step Motor Direction 0: CW 1: CCW Step Enable 0: disable 1: enable STEPIRQ Clear 1:clear Rst. Value xxx00000b Read Value 00h |
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