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CS5530A Datasheet(PDF) 154 Page - Advanced Micro Devices |
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CS5530A Datasheet(HTML) 154 Page - Advanced Micro Devices |
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154 / 259 page ![]() 154 AMD Geode™ CS5530A Companion Device Data Book Register Summary Revision 1.1 Real Time Clock Registers (Table 5-32) 070h WO RTC Address Register Page 222 071h R/W RTC Data Register Page 222 Miscellaneous Registers (Table 5-33) 170h-177h/ 376h R/W Secondary IDE Registers Page 223 1F0h-1F7h/ 3F6h R/W Primary IDE Registers Page 223 4D0h R/W Interrupt Edge/Level Select Register 1 Page 223 4D1h R/W Interrupt Edge/Level Select Register 2 Page 223 121Ch-121Fh RO ACPI Timer Count Register Note: The ACPI Timer Count Register is accessible through I/O Port 121Ch. Oth- erwise use F1BAR+Offset 1Ch. Page 223 Table 5-13. ISA Legacy I/O Registers Summary (Continued) I/O Port Type Name Reference Table 5-14. V-ACPI I/O Register Space Summary ACPI_ BASE Type Align Length Name Reset Value Reference (Table 5-34) 00h-03h R/W 4 4 P_CNT: Processor Control Register 00000000h Page 224 04h RO 1 1 P_LVL2: Enter C2 Power State Register 00h Page 224 05h -- 1 1 Reserved 00h Page 224 06h R/W 1 1 SMI_CMD: OS/BIOS Requests Register (ACPI Enable/ Disable Port) 00h Page 224 07h -- 1 1 Reserved 00h Page 225 08h-09h R/W 2 2 PM1A_STS: PM1A Status Register 0000h Page 225 0Ah-0Bh R/W 2 2 PM1A_EN: PM1A Enable Register 0000h Page 225 0Ch-0Dh R/W 4 2 PM1A_CNT: PM1A Control Register 0000h Page 225 0Eh-0Fh R/W 2 2 SETUP_IDX: Setup Index Register (V-ACPI internal index register) 0000h Page 226 10h-11h R/W 2 2 GPE0_STS: General Purpose Event 0 Status Register 0000h Page 226 12h-13h R/W 2 2 GPE0_EN: General Purpose Event 0 Enable Register 0000h Page 226 14h-17h R/W 4 4 SETUP_DATA: Setup Data Register (V-ACPI internal data register) 00000000h Page 227 18h-1Fh -- 8 Reserved: For Future V-ACPI Implementations -- Page 227 |
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