AD5770R datasheet(41/59 Pages) AD

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Data Sheet

AD5770R

Rev. 0 | Page 41 of 59

Address: 0x11, Reset: 0x00, Name: INTERFACE_STATUS_A

Interface Not Ready

[7] INTERFACE_NOT_READY (R)

[6:0] RESERVED

Table 26. Bit Descriptions for INTERFACE_STATUS_A

Bits

Bit Name

Description

Reset

Access

INTERFACE_NOT_READY

Interface not ready. When this bit is set, the device is not ready to receive data on the

SPI bus.

0x0

[6:0]

Reserved

Reserved.

0x0

Address: 0x14, Reset: 0x80, Name: CHANNEL_CONFIG

Channel 0 Sink Current Generator

Enable

1: Enable.

0: Disable.

Channel 0 Output Enable

1: Norm al Operation.

0: Output Shutdown.

Channel 1 Output Enable

1: Norm al Operation.

0: Output Shutdown.

Channel 5 Output Enable

1: Norm al Operation.

0: Output Shutdown.

Channel 2 Output Enable

1: Norm al Operation.

0: Output Shutdown.

Channel 4 Output Enable

1: Norm al Operation.

0: Output Shutdown.

Channel 3 Output Enable

1: Norm al Operation.

0: Output Shutdown.

[7] CH0_SINK_EN (R/W)

[0] CH0_SHUTDOWN_B (R/W)

[6] RESERVED

[1] CH1_SHUTDOWN_B (R/W)

[5] CH5_SHUTDOWN_B (R/W)

[2] CH2_SHUTDOWN_B (R/W)

[4] CH4_SHUTDOWN_B (R/W)

[3] CH3_SHUTDOWN_B (R/W)

Table 27. Bit Descriptions for CHANNEL_CONFIG

Bits

Bit Name

Description

Reset

Access

CH0_SINK_EN

Channel 0 sink current generator enable. When this bit is set, Channel 0 sink current is

enabled.

0x1

R/W

0: disable.

1: enable.

Reserved

Reserved.

0x0

CH5_SHUTDOWN_B

Channel 5 output enable. This active low enable bit shuts down the output of IDAC5

when asserted.

0x0

R/W

0: output shutdown.

1: normal operation.

CH4_SHUTDOWN_B

Channel 4 output enable. This active low enable bit shuts down the output of IDAC4 when

asserted.

0x0

R/W

0: output shutdown.

1: normal operation.

CH3_SHUTDOWN_B

Channel 3 output enable. This active low enable bit shuts down the output of IDAC3 when

asserted.

0x0

R/W

0: output shutdown.

1: normal operation.

CH2_SHUTDOWN_B

Channel 2 output enable. This active low enable bit shuts down the output of IDAC2 when

asserted.

0x0

R/W

0: output shutdown.

1: normal operation.

CH1_SHUTDOWN_B

Channel 1 output enable. This active low enable bit shuts down the output of IDAC1 when

asserted.

0x0

R/W

0: output shutdown.

1: normal operation.

CH0_SHUTDOWN_B

Channel 0 output enable. This active low enable bit shuts down the output of IDAC0 when

asserted.

0x0

R/W

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