AD5770R datasheet(3/59 Pages) AD

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Data Sheet

AD5770R

Rev. 0 | Page 3 of 59

SPECIFICATIONS

AVDD = DVDD = 2.9 V to 5.5 V, PVDD = 0.8 V to AVDD − 0.4 V, AVEE = −3.0 V to 0 V, 2.5 V ≤ PVDD − AVEE ≤ 5.5 V,

IOVDD = 1.65 V to 5.5 V, AVEE ≤ PVEE0 ≤ 0 V, AVDD − PVEE0 ≤ 5.5 V, VREF = 1.25 V external voltage reference, ambient

temperature (TA) = −40°C to +105°C, unless otherwise noted.

Table 1.

Parameter1

Min

Typ

Max

Unit

Test Conditions/Comments

STATIC PERFORMANCE, EXTERNAL RSET2

VREF = 1.25 V external voltage reference,

assumes ideal 2.5 kΩ external RSET resistor,

all channels and all output current ranges

Resolution

Bits

Relative Accuracy (INL)

−6.5

+6.5

LSB

Differential Nonlinearity (DNL)

−1

LSB

TA = −20°C to +105°C, guaranteed

monotonic

−1

+1.2

LSB

Guaranteed monotonic

Total Unadjusted Error

−1.3

+1.3

% full-scale

range (FSR)

Zero-Scale Error

+600

μA

All 0s loaded into the DAC register

Zero-Scale Error Drift

500

nA/°C

Channel 0, Channel 1

300

nA/°C

Channel 2

170

nA/°C

Channel 3, Channel 4, Channel 5

Offset Error

−600

+600

μA

Offset Error Drift

μA/°C

Channel 0, Channel 1

0.5

μA/°C

Channel 2, Channel 3, Channel 4, Channel 5

Full-Scale Error

−1.3

+1.3

% FSR

All 1s loaded into the DAC register

Full-Scale Error Drift

ppm/°C

Channel 0, Channel 1

ppm/°C

Channel 2, Channel 3, Channel 4, Channel 5

Gain Error

−1.3

+1.3

% FSR

Gain Temperature Coefficient

ppm/°C

Channel 0, Channel 1

ppm/°C

Channel 2, Channel 3, Channel 4, Channel 5

DC Crosstalk

LSB

TA = 25°C, due to full-scale change in output

current on a single adjacent channel

DC Power Supply Rejection Ratio (PSRR)

μA/V

TA = 25°C, DAC register loaded to full scale

STATIC PERFORMANCE, INTERNAL RSET

VREF = 1.25 V internal voltage reference,

all channels and all output current ranges

Resolution

Bits

Relative Accuracy (INL)

−6.5

+6.5

LSB

Differential Nonlinearity (DNL)

−1

LSB

TA = −20°C to +105°C, guaranteed

monotonic

−1

+1.2

LSB

Guaranteed monotonic

Total Unadjusted Error (TUE)

−1.3

+1.3

% FSR

Zero-Scale Error

+600

μA

All 0s loaded into the DAC register

Zero-Scale Error Drift

500

nA/°C

Channel 0, Channel 1

300

nA/°C

Channel 2

170

nA/°C

Channel 3, Channel 4, Channel 5

Offset Error

−600

+600

μA

Offset Error Drift

μA/°C

Channel 0, Channel 1

0.5

μA/°C

Channel 2, Channel 3, Channel 4, Channel 5

Full-Scale Error

−1.3

+1.3

% FSR

All 1s loaded into the DAC register

Full-Scale Error Drift

ppm/°C

Channel 0, Channel 1

ppm/°C

Channel 2, Channel 3, Channel 4, Channel 5

Gain Error

−1.3

+1.3

% FSR

Gain Temperature Coefficient

ppm/°C

Channel 0, Channel 1

ppm/°C

Channel 2, Channel 3, Channel 4, Channel 5

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