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AD5770R Datasheet(PDF) 6 Page - Analog Devices

Part # AD5770R
Description  6-Channel, 14-Bit, Current Output DAC
PDF  59 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5770R Datasheet(HTML) 6 Page - Analog Devices

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AD5770R
Data Sheet
Rev. 0 | Page 6 of 59
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
Digital Power Supply Current
DVDD Supply Current
1.1
mA
IODVDD Supply Current
200
nA
Power Consumption
110
mW
All outputs at 0 A, nominal supplies
1
See the Terminology section.
2
See the Precision RSET Resistor section for more information about the internal and external RSET resistors
3
When sourcing current, the output compliance voltage is the maximum voltage at the IDACx pin, for which the output current is within 0.1% of the measured full-
scale range. When sinking current on Channel 0, the output compliance voltage is the minimum voltage at the IDAC0 pin, for which the output current is within 0.1%
of the measured zero-scale current.
4
The active low ALARM pin can be configured as an open drain. Refer to the ALARM section.
5
The internal temperature sensing diode can be biased with an internal or external current. Refer to the Internal Die Temperature Monitoring section.
AC PERFORMANCE CHARACTERISTICS
AVDD = DVDD = 2.9 V to 5.5 V, PVDD = 0.8 V to AVDD − 0.4 V, AVEE = −3.0 V to 0 V, 2.5 V ≤ PVDD − AVEE ≤ 5.5 V,
IOVDD = 1.65 V to 5.5 V, AVEE ≤ PVEE0 ≤ 0 V, AVDD − PVEE0 ≤ 5.5 V, VREF = 1.25 V external voltage reference, TA = 25°C, unless
otherwise noted.
Table 2.
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments2
DYNAMIC PERFORMANCE
Output Current Settling Time
13
µs
Zero-scale to full-scale step settling to ±4 LSB,
0 mA to 300 mA range
10
µs
Zero-scale to full-scale step settling to ±4 LSB,
0 mA to 45 mA range, Channel 3, Channel 4, and
Channel 5
Slew Rate
50
mA/µs
Channel 0 , 0 mA to 300 mA range
10
mA/µs
Channel 3, Channel 4, Channel 5, 0 mA to
45 mA range
Digital-to-Analog Glitch Impulse
0.057
nA-sec
1 LSB change around major carry
Multiplexer Switching Glitch
14
pA-sec
Switching monitored channel
Digital Feedthrough
0.03
nA-sec
Digital Crosstalk
0.03
nA-sec
DAC-to-DAC Crosstalk
0.8
nA-sec
Victim Channel 4, due to a 300 mA step change
on Channel 0
Output Noise Spectral Density (NSD)
35
nA/√Hz
Channel 0, 0 mA to 300 mA range, at 1 kHz, DAC
register loaded to midscale
18
nA/√Hz
Channel 1, 0 mA to 140 mA low noise range, at
1 kHz, DAC register loaded to midscale
19
nA/√Hz
Channel 2, 0 mA to 150 mA range, at 1 kHz, DAC
register loaded to midscale
13
nA/√Hz
Channel 3, Channel 4, Channel 5, 0 mA to
100 mA range, at 1 kHz, DAC register loaded to
midscale
16
nA/√Hz
Channel 0, 0 mA to 300 mA range, at 10 kHz,
DAC register loaded to midscale
9
nA/√Hz
Channel 1, 0 mA to 140 mA low noise range, at
10 kHz, DAC register loaded to midscale
9
nA/√Hz
Channel 2, 0 mA to 150 mA range, at 10 kHz,
DAC register loaded to midscale
6
nA/√Hz
Channel 3, Channel 4, Channel 5, 0 mA to
100 mA range, at 10 kHz, DAC register loaded to
midscale



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