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AD5770R Datasheet(PDF) 26 Page - Analog Devices |
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AD5770R Datasheet(HTML) 26 Page - Analog Devices |
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26 / 59 page ![]() AD5770R Data Sheet Rev. 0 | Page 26 of 59 and bypassed on power up. The multiplexer buffer is enabled by setting the MUX_BUFFER bit in the MONITOR_SETUP register. Compliance Voltage Monitoring When the MON_FUNCTION bits in the MONITOR_ SETUP register are set to select output voltage monitoring, the output compliance voltage of the selected DAC channel is multiplexed onto the MUX_OUT pin. The IDACx channel to be monitored is selected using the MON_CH bits in the MONITOR_SETUP register. Output Current Monitoring When the MON_FUNCTION bits in the MONITOR_SETUP register select output current monitoring, a voltage representation of the output current of the selected DAC channel is multiplexed onto the MUX_OUT pin. The output current can only be monitored in current sourcing mode. The IDACx channel to be monitored is selected using the MON_CH bits in the MONITOR_ SETUP register. The output current is calculated by ( ) × − = 400 mV FULLSCALE MUX OS SOURCE I VV I (1) where: ISOURCE is the output current being sourced. IFULLSCALE is the full-scale output current. VMUX is the measured voltage at the MUX_OUT pin. VOS is the monitor offset voltage, nominally 28 mV. Uncalibrated, the current monitoring feature is accurate to within 10% of the full-scale output range. To improve the accuracy of the current monitor feature, calibrate VOS by measuring the voltage at the MUX_OUT pin at zero scale. To calibrate the 400 mV term, measure the voltage at the MUX_OUT pin at full scale. For 0 mA to 140 mA low headroom mode on Channel 1, use a value of 250 mA for IFULLSCALE. Internal Die Temperature Monitoring When temperature monitoring is selected in the MONITOR_ SETUP register, a voltage representation of the internal die temperature is multiplexed onto the MUX_OUT pin. To monitor the internal die temperature, a precision current is forced through a diode on the chip, and the voltage across the diode is multiplexed onto the MUX_OUT pin. Choose to use an external bias current for the temperature monitoring function by setting the IB_EXT_EN bit high in the MONITOR_SETUP register. The external bias current must be forced into the MUX_OUT pin. The multiplexer buffer must be bypassed when using an external bias current for temperature monitoring. Using the internal bias current with the IB_EXT_EN bit set low, calculate the internal die temperature as follows: 700 mV 25 1.8 mV D V T − = + (2) where: T is the die temperature (°C). VD is the diode voltage. Using an external bias current of 100 µA, with the IB_EXT_EN bit set high, the internal die temperature can be calculated as follows: 880 mV 25 1.3 mV D V T − = + (3) When using an external bias current of 200 µA, with the IB_EXT_EN bit set high, the die temperature can be calculated as follows: 1.04 V 25 0.9 mV D V T − = + (4) SERIAL INTERFACE The AD5770R has a 4-wire (CS, SCLK, SDI, and SDO) interface that is compatible with SPI, QSPI, and MICROWIRE interface standards as well as most digital signal processors (DSPs). For both read and write SPI transactions, data must be valid on the rising edge of SCLK (SCLK clock polarity = 0, SCLK clock phase = 0). For all SPI transactions, data is shifted MSB first. Communication with the device is separated into two distinct phases of operation. The first phase is the instruction phase and is used to initiate some action of the device. The second phase is the data phase where data is either passed to the device to operate on or received from the device in response to the instruction phase. Figure 71 illustrates the SPI transaction phases. CS SDI SDO R/W DATA BYTE DATA BYTE 7-BIT ADDRESS DATA BYTE Z INSTRUCTION PHASE DATA BYTE DATA PHASE Figure 71. SPI Transaction Phases Instruction Phase The instruction phase immediately follows the falling edge of CS that initiates the SPI transaction. The instruction phase consists of a read/write bit (R/W) followed by a register address word. Setting R/W high selects a read instruction. Setting R/W low selects a write instruction. The address word is 7 bits long. The register address sent in the instruction phase is used as the starting address to start writing or reading from. Refer to Table 12 and Table 13 for a full list of registers and the associated addresses. Data Phase The data phase immediately follows the instruction phase. When a write instruction is sent to the device, data is written to the register location selected. When a read instruction is sent to the device, data stored in the register location selected is shifted out on the SDO pin. |
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