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C161 Datasheet(PDF) 174 Page - Infineon Technologies AG

Part # C161
Description  16-Bit Single-Chip Microcontroller
PDF  400 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C161 Datasheet(HTML) 174 Page - Infineon Technologies AG

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User’s Manual
9-10
1999-08
CS Signal Generation
During external accesses the EBC can generate a (programmable) number of CS lines
on Port 6, which allow to directly select external peripherals or memory banks without
requiring an external decoder. The number of CS lines is selected during reset and
coded in bit field CSSEL in register RP0H (see table below).
The CSx outputs are associated with the BUSCONx registers and are driven active (low)
for any access within the address area defined for the respective BUSCON register. For
any access outside this defined address area the respective CSx signal will go inactive
(high). At the beginning of each external bus cycle the corresponding valid CS signal is
determined and activated. All other CS lines are deactivated (driven high) at the same
time.
Note: The CSx signals will not be updated for an access to any internal address area
(i.e. when no external bus cycle is started), even if this area is covered by the
respective ADDRSELx register. An access to an on-chip X-Peripheral deactivates
all external CS signals.
Upon accesses to address windows without a selected CS line all selected CS
lines are deactivated.
The chip select signals allow to be operated in four different modes (see table below)
which are selected via bits CSWENx and CSRENx in the respective BUSCONx register.
Table 9-4
Decoding of Chip Select Lines
CSSEL
Chip Select Lines
Note
1 1
Five:
CS4...CS0
Default without pull-downs
1 0
None
Port 6 pins free for IO
0 1
Two:
CS1...CS0
0 0
Three:
CS2...CS0
Table 9-5
Chip Select Generation Modes
CSWENx CSRENx Chip Select Mode
0
0
Address Chip Select (Default after Reset)
0
1
Read Chip Select
1
0
Write Chip Select
1
1
Read/Write Chip Select



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