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C161 Datasheet(PDF) 176 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 176 Page - Infineon Technologies AG |
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176 / 400 page  &3, 7KH([WHUQDO%XV ,QWHUIDFH User’s Manual 9-12 1999-08 9.3 Programmable Bus Characteristics Important timing characteristics of the external bus interface have been made user programmable to allow to adapt it to a wide range of different external bus and memory configurations with different types of memories and/or peripherals. The following parameters of an external bus cycle are programmable: • ALE Control defines the ALE signal length and the address hold time after its falling edge • Memory Cycle Time (extendable with 1...15 waitstates) defines the allowable access time • Memory Tri-State Time (extendable with 1 waitstate) defines the time for a data driver to float • Read/Write Delay Time defines when a command is activated after the falling edge of ALE • READY Control defines, if a bus cycle is terminated internally or externally Note: Internal accesses are executed with maximum speed and therefore are not programmable. External accesses use the slowest possible bus cycle after reset. The bus cycle timing may then be optimized by the initialization software. Figure 9-5 Programmable External Bus Cycle ALECTL MCTC MTTC |
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