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C161 Datasheet(PDF) 221 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 221 Page - Infineon Technologies AG |
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221 / 400 page  &3, 7KH*HQHUDO 3XUSRVH 7LPHU8QLWV User’s Manual 10-29 1999-08 Timer T5 in Timer Mode When the auxiliary timer T5 is programmed to timer mode, their operation is the same as described for the core timer T6. The descriptions, figures and tables apply accordingly. CI Register CAPREL Capture Trigger Selection (depending on bit CT3) 00: Capture disabled 01: Positive transition (rising edge) on CAPIN or any transition on T3IN 10: Negative transition (falling edge) on CAPIN or any transition on T3EUD 11: Any transition (rising or falling edge) on CAPIN or any transition on T3IN or T3EUD T5CLR Timer 5 Clear Bit 0: Timer 5 not cleared on a capture 1: Timer 5 is cleared on a capture T5SC Timer 5 Capture Mode Enable 0: Capture into register CAPREL disabled 1: Capture into register CAPREL enabled Bit Function |
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