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AX58100 Datasheet(PDF) 35 Page - ASIX Electronics Corporation |
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AX58100 Datasheet(HTML) 35 Page - ASIX Electronics Corporation |
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35 / 71 page  35 Copyright © 2018-2019 ASIX Electronics Corporation. All rights reserved. AX58100 EtherCAT Slave Controller 0x084 0x3084 - SPIDBSR SPI Delay Byte and SS Register 0x086 0x3086 - SPIDTR SPI Delay Transfer Register 0x088 0x3088 - SPIRPTR SPI RDY / Pulse Time Register 0x08A 0x308A - SPILTR SPI LDAC Time Register 0x08C 0x308C - SPIPRLR SPI Pulse/ RDY/ LDAC Register 0x090 0x3090 - SPI01BCR SPI 0/1 Byte Count Register 0x092 0x3092 - SPI23BCR SPI 2/3 Byte Count Register 0x094 0x3094 - SPI45BCR SPI 4/5 Byte Count Register 0x096 0x3096 - SPI67BCR SPI 6/7 Byte Count Register 0x098 0x3098 - SPI03SSR SPI 0/1/2/3 slave Select Register 0x09A 0x309A - SPI47SSR SPI 4/5/6/7 slave Select Register 0x0A8 - 0x32A8 SPINTSR SPI Interrupt Status Register 0x0AA - 0x32AA SPITSR SPI Timeout Status Register 0x0AC - 0x32AC SPIPOSR SPI Pulse Overrun Status Register 0x0AE - 0x32AE SPIDSR SPI Data Status Register 0x0B0 0x30B0 0x32B0 SPIC0DR SPI Channel 0 Data Register 0x0B8 0x30B8 0x32B8 SPIC1DR SPI Channel 1 Data Register 0x0C0 0x30C0 0x32C0 SPIC2DR SPI Channel 2 Data Register 0x0C8 0x30C8 0x32C8 SPIC3DR SPI Channel 3 Data Register 0x0D0 0x30D0 0x32D0 SPIC4DR SPI Channel 4 Data Register 0x0D8 0x30D8 0x32D8 SPIC5DR SPI Channel 5 Data Register 0x0E0 0x30E0 0x32E0 SPIC6DR SPI Channel 6 Data Register 0x0E8 0x30E8 0x32E8 SPIC7DR SPI Channel 7 Data Register 0x0F0 - 0x32F0 SPIDSMR SPI Data Status Mirror Register 0x0F2 0x30F2 - SPIMCR SPI Master Control Register 0x100 0x3100 - INTCR Interrupt Configure Register 0x102 0x3102 - INTSR Interrupt Status Register Table 3-4: ESC Memory and Function Regiters Mirror Mapping Table |
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