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AX58100 Datasheet(PDF) 40 Page - ASIX Electronics Corporation |
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AX58100 Datasheet(HTML) 40 Page - ASIX Electronics Corporation |
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40 / 71 page ![]() 40 Copyright © 2018-2019 ASIX Electronics Corporation. All rights reserved. AX58100 EtherCAT Slave Controller Power–up Sequence Figure 4-2: Power-up Sequence Timing Diagram Symbol Parameter Conditions Min Typ Max Units Trise3 3.3V power supply rise time. From 0V to 3.3V. - - 20 ms Trise2 1.2V power supply rise time. From 0V to 1.2V. - - 20 ms T23 VCCK rising to 1.2V to VCC3IO rising to 3.3V interval. - 0 - ms Tclk 25MHz crystal oscillator start-up time. From VCC3IO rising to 3.3V to clock stable of 25MHz crystal oscillator. - - 60 ms Trst POR asserted low level interval. From VCCK rising to 1.2V to POR going high. - 65 - ms Table 4-4: Power-up Sequence Timing Table Note: 1. The above typical timing data is measured from AX58100 test board. 2. The Trst typical value is measured from AX58100 test board with the internal POR. 0V 3.3V Trise3 0V 1.2V Trise2 T23 Tclk Trst VCCK /VCC12A_PLL VCC3IO/VCC33A RSTn XSCI … |
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