| Electronic Components Datasheet Search |
|
AX58100 Datasheet(PDF) 43 Page - ASIX Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AX58100 Datasheet(HTML) 43 Page - ASIX Electronics Corporation |
|
43 / 71 page ![]() 43 Copyright © 2018-2019 ASIX Electronics Corporation. All rights reserved. AX58100 EtherCAT Slave Controller 4.5.2 Port 2 MII Timing Figure 4-6: Port 2 MII TX Timing Diagram Symbol Description Min Typ Max Units TCLK25 MCLK output - 40 - ns TTX_delay TX_EN/TXD[3:0] delay after rising edge of MCLK - - 2 ns TPHY_TX_CLK Delay between MCLK and TX_CLK output of the PHY - PHY dependent - ns TPHY_TX_setup PHY setup time PHY dependent - - ns TPHY_TX_hold PHY hold time PHY dependent - - ns Table 4-6: Port 2 MII TX Timing Table |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |