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LM60430 Datasheet(PDF) 26 Page - Texas Instruments

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Part # LM60430
Description  LM604x0 3.8-V to 36-V, 3-A, and 4-A Ultra-Small Synchronous Step-Down Converter
PDF  38 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM60430 Datasheet(HTML) 26 Page - Texas Instruments

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LM60440, LM60430
SNVSBN5A – FEBRUARY 2020 – REVISED JUNE 2020
www.ti.com
Product Folder Links: LM60440 LM60430
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
11 Layout
11.1 Layout Guidelines
The PCB layout of any DC/DC converter is critical to the optimal performance of the design. Bad PCB layout can
disrupt the operation of an otherwise good schematic design. Even if the converter regulates correctly, bad PCB
layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore,
the EMI performance of the regulator is dependent on the PCB layout, to a great extent. In a buck converter, the
most critical PCB feature is the loop formed by the input capacitor or input capacitors, and power ground, as
shown in Figure 21. This loop carries large transient currents that can cause large transient voltages when
reacting with the trace inductance. These unwanted transient voltages will disrupt the proper operation of the
converter. Because of this, the traces in this loop must be wide and short, and the loop area as small as possible
to reduce the parasitic inductance.
1. Place the input capacitor or capacitors as close as possible to the VIN and GND terminals. VIN and
GND pins are adjacent, simplifying the input capacitor placement. With the WQFN package there are two
VIN/PGND pairs on either side of the package. This provides for a symmetrical layout and helps minimize
switching noise and EMI generation. A wide VIN plane must be used on a lower layer to connect both of the
VIN pairs together to the input supply; see Figure 22.
2. Place bypass capacitor for VCC close to the VCC pin. This capacitor must be placed close to the device
and routed with short, wide traces to the VCC and GND pins.
3. Use wide traces for the CBOOT capacitor. Place CBOOT close to the device with short/wide traces to the
BOOT and SW pins.
4. Place the feedback divider as close as possible to the FB pin of the device. Place RFBB, RFBT, and CFF,
if used, physically close to the device. The connections to FB and GND must be short and close to those
pins on the device. The connection to VOUT can be somewhat longer. However, this latter trace must not be
routed near any noise source (such as the SW node) that can capacitively couple into the feedback path of
the regulator.
5. Use at least one ground plane in one of the middle layers. This plane acts as a noise shield and also act
as a heat dissipation path.
6. Provide wide paths for VIN, VOUT, and GND. Making these paths as wide and direct as possible reduces
any voltage drops on the input or output paths of the converter and maximizes efficiency.
7. Provide enough PCB area for proper heat sinking. As stated in the Maximum Ambient Temperature
section, enough copper area must be used to ensure a low RθJA, commensurate with the maximum load
current and ambient temperature. Make the top and bottom PCB layers with two-ounce copper; and no less
than one ounce. If the PCB design uses multiple copper layers (recommended), thermal vias can also be
connected to the inner layer heat-spreading ground planes.
8. Keep switch area small. Keep the copper area connecting the SW pin to the inductor as short and wide as
possible. At the same time the total area of this node should be minimized to help reduce radiated EMI.
See the following PCB layout resources for additional important guidelines:
•
Layout Guidelines for Switching Power Supplies
•
Simple Switcher PCB Layout Guidelines
•
Construction Your Power Supply- Layout Considerations
•
Low Radiated EMI Layout Made Simple with LM4360x and LM4600x



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