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MPC5673K Datasheet(PDF) 70 Page - NXP Semiconductors

Part # MPC5673K
Description  MPC5675K Microcontroller
PDF  147 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC5673K Datasheet(HTML) 70 Page - NXP Semiconductors

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MPC5675K Microcontroller Data Sheet, Rev. 8.1
Electrical characteristics
NXP Semiconductors
70
3.3
Recommended operating conditions
18
VSS_LV_COR
SR Core supply voltage ground digital logic
—
–0.1
0.1
V
19
VDD_LV_PLL
SR PLL supply voltage
—
–0.3
1.32
V
20
VSS_LV_PLL
SR PLL reference voltage
—
–0.1
0.1
V
21
TVDD
SR Slope characteristics on all VDD during power
up
——
25
mV/µs
22
VIN
SR Voltage on any pin with respect to its supply rail
VDD_HV_xxx
Relative to
VDD_HV_xxx
–0.3
VDD_HV_xxx
+0.38
V
23
IINJPAD
SR Injected input current on any pin during
overload condition
—
–10
10
mA
24
IINJPADA
SR Injected input current on any analog pin during
overload condition
—
–3
3
mA
25
IINJSUM
SR Absolute sum of all injected input currents
during overload condition
—
–50
50
mA
26
TSTG
SR Storage temperature
—
–559
150
°C
27
TSDR
SR Maximum Solder Temperature10
Pb-free package
SnPb package
—
—
—
260
245
°C
28
MSL
SR Moisture Sensitivity Level11
——
3
—
1 Functional operating conditions are given in the DC electrical characteristics. Absolute maximum ratings are stress
ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect
device reliability or cause permanent damage to the device.
2 6.5 V for 10 hours cumulative time, 5.0 V + 10% for time remaining.
3 5.3 V for 10 hours cumulative over lifetime of device, 3.63 V for time remaining.
4 Voltage overshoots during a high-to-low or low-to-high transition must not exceed 10 seconds per instance.
5 As the V
DD_HV_DRAM_VREF supply should always be constrained by the VDD_HV_DRAM supply for example through a
voltage divider network per the JEDEC specification, the maximum ratings for the VDD_HV_DRAM supply should be used
for the VDD_HV_DRAM_VREF reference as well.
6 All V
DD_HV_ADRx rails must be operated at the same supply voltage.
7 2.0 V for 10 hours cumulative time, 1.2 V + 10% for time remaining.
8 Only when V
DD_HV_xxx < 5.2 V.
9 If the ambient temperature is at or above the minimum storage temperature and below the recommended minimum
operating temperature, power may be applied to the device safely. However, functionality is not guaranteed and a power
cycle must be administered if in internal regulation mode or an assertion of RESET_SUP_B must be administered if in
external regulation mode once device enters into the recommended operating temperature range.
10 Solder profile per CDF-AEC-Q100.
11 Moisture sensitivity per JEDEC test method A112.
Table 12. Recommended operating conditions
No.
Symbol
Parameter
Conditions
Min
Max
Unit
1VDD_HV_PMU
SR Voltage regulator supply voltage
—
3.0
5.5
V
Table 11. Absolute maximum ratings1 (continued)
No.
Symbol
Parameter
Conditions
Min
Max
Unit



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