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MPC5673K Datasheet(PDF) 74 Page - NXP Semiconductors

Part # MPC5673K
Description  MPC5675K Microcontroller
PDF  147 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC5673K Datasheet(HTML) 74 Page - NXP Semiconductors

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MPC5675K Microcontroller Data Sheet, Rev. 8.1
Electrical characteristics
NXP Semiconductors
74
In case of only narrow band disturbances the maximum of the results will not change. In case of broadband signals the emission
has to be below the limits.
3.6
Electrostatic discharge (ESD) characteristics
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according
to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n + 1) supply pin).
This test conforms to the AEC-Q100-002/-003/-011 standard.
3.7
Static latch-up (LU)
Two complementary static tests are required on six parts to assess the latch-up performance:
•
A supply over voltage is applied to each power supply pin.
•
A current injection is applied to each input, output and configurable I/O pin.
These tests are compliant with the EIA/JESD 78 IC latch-up standard.
3.8
Power Management Controller (PMC) electrical characteristics
3.8.1
PMC electrical specifications
This section contains electrical characteristics for the PMC.
Table 15. ESD ratings1, 2
1 All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated
Circuits.
2 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification requirements. Complete DC parametric and functional testing shall be performed per applicable
device specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
No.
Symbol
Parameter
Conditions
Class
Max value3
3 Data based on characterization results, not tested in production.
Unit
1VESD(HBM)
SR Electrostatic discharge
(Human Body Model)
TA =25 °C
conforming to AEC-Q100-002
H1C
2000
V
2VESD(MM)
SR Electrostatic discharge
(Machine Model)
TA =25 °C
conforming to AEC-Q100-003
M2
200
V
3VESD(CDM)
SR Electrostatic discharge
(Charged Device Model)
TA =25 °C
conforming to AEC-Q100-011
C3A
750 (corners)
V
500
Table 16. Latch-up results
No.
Symbol
Parameter
Conditions
Class
1
LU
CC
Static latch-up class
TA = 125 °C conforming to JESD 78
II level A



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