DS3172 datasheet(133/232 Pages) DALLAS

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GL.SR

Global Status Register

014h

Bit #

Name

Bit #

Name

CLOL

GPMS

Bit 1 : CLAD Loss of Lock (CLOL) – This bit is set when any of the PLLs in the CLAD are not locked to the

reference frequency.

Bit 0: Global Performance Monitoring Update Status (GPMS) This bit is set when all of the port performance

set. It is an “AND” of all the globally enabled port PMU status bits. In global software update mode, the global

update request bit (GL.CR1.GPMU) should be held high until this status bit goes high.

0 = The associated update request signal is low or not all register updates are completed

1 = The requested performance register updates are all completed

GL.SRL

Global Status Register Latched

016h

Bit #

Name

Bit #

Name

8KREFL

CLADL

ONESL

CLOLL

GPMSL

Bit 4: 8K Reference Activity Status Latched (8KREFL) This bit will be set when the 8 kHz reference signal on

the GPIO4 pin is active. The GL.CR2.G8KIS bit must be set for the activity to be monitored.

Bit 3: CLAD Reference Clock Activity Status Latched (CLADL) This bit will be set when the CLAD PLL

reference clock signal on the CLKA pin is active.

Bit 2: One Second Status Latched (ONESL) This bit will be set once a second. The GL.ISR.GSR status bit will

be set when this bit is set and the GL.SRIE.ONESIE bit is enabled. The

INT pin will be driven low if this bit is set

and the GL.SRIE.ONESIE bit and the GL.ISRIE.GSRIE bit are enabled.

Bit 1: CLAD Loss Of Lock Latched (CLOLL) This bit will be set when the GL.SR.CLOL status bit changes from

low to high. The GL.ISR.GSR bit will be set when this bit is set and the GL.SRIE.CLOLIE bit is set and the

INT pin

will be driven low if the GL.ISRIE.GSRIE bit is also enabled.

Bit 0: Global Performance Monitoring Update Status Latched (GPMSL) This bit will be set when the

GL.SR.GPMS status bit changes from low to high. This bit will set the GL.ISR.GSR status bit if the

GL.SRIE.GPMSIE is enabled. This bit will drive the interrupt pin low if the GL.SRIE.GPMSIE bit and the

GL.ISRIE.GSRIE bit are enabled.

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