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DS3172 Datasheet(PDF) 203 Page - Dallas Semiconductor |
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DS3172 Datasheet(HTML) 203 Page - Dallas Semiconductor |
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203 / 232 page ![]() DS3171/DS3172/DS3173/DS3174 203 of 232 Register Name: E3G832.RFECR Register Description: E3 G.832 Receive Framing Error Count Register Register Address: (1,3,5,7)34h Bit # 15 14 13 12 11 10 9 8 Name FE15 FE14 FE13 FE12 FE11 FE10 FE9 FE8 Default 0 0 0 0 0 0 0 0 Bit # 7 6 5 4 3 2 1 0 Name FE7 FE6 FE5 FE4 FE3 FE2 FE1 FE0 Default 0 0 0 0 0 0 0 0 Bits 15 to 0: Framing Error Count (FE[15:0]) – These sixteen bits indicate the number of framing error events on the incoming E3 data stream. This register is updated via the PMU signal (see Section 10.4.5). Register Name: E3G832.RPECR Register Description: E3 G.832 Receive Parity Error Count Register Register Address: (1,3,5,7)36h Bit # 15 14 13 12 11 10 9 8 Name PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8 Default 0 0 0 0 0 0 0 0 Bit # 7 6 5 4 3 2 1 0 Name PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0 Default 0 0 0 0 0 0 0 0 Bits 15 to 0: Parity Error Count (PE[15:0]) – These sixteen bits indicate the number of parity (BIP-8) errors detected on the incoming E3 data stream. This register is updated via the PMU signal (see Section 10.4.5). |
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