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VR4102 Datasheet(PDF) 273 Page - NEC |
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VR4102 Datasheet(HTML) 273 Page - NEC |
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273 / 701 page  CHAPTER 11 DMAAU (DMA ADDRESS UNIT) 273 11.2.1 AIU IN DMA Base Address Registers (1) AIUIBALREG (0x0B00 0020) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name AIUIBA[15] AIUIBA[14] AIUIBA[13] AIUIBA[12] AIUIBA[11] AIUIBA[10] AIUIBA[9] AIUIBA[8] R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 1 1 1 1 1 0 0 0 Other resets 1 1 1 1 1 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name AIUIBA[7] AIUIBA[6] AIUIBA[5] AIUIBA[4] AIUIBA[3] AIUIBA[2] AIUIBA[1] AIUIBA[0] R/W R/W R/W R/W R/W R/W R/W R/W R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15:1] AIUIBA[15:1] DMA base address [15:1] for AIU input D[0] AIUIBA[0] DMA base address [0] for AIU input Write 0 when writing. 0 is returned after a read. (2) AIUIBAHREG (0x0B00 0022) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name AIUIBA[31] AIUIBA[30] AIUIBA[29] AIUIBA[28] AIUIBA[27] AIUIBA[26] AIUIBA[25] AIUIBA[24] R/W R RR RRR R R/W RTCRST 0 0 0 0 0 0 0 1 Other resets 0 0 0 0 0 0 0 1 Bit D7 D6D5 D4D3D2 D1 D0 Name AIUIBA[23] AIUIBA[22] AIUIBA[21] AIUIBA[20] AIUIBA[19] AIUIBA[18] AIUIBA[17] AIUIBA[16] R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 1 1 1 1 1 1 1 1 Other resets 1 1 1 1 1 1 1 1 Bit Name Function D[15:9] AIUIBA[31:25] DMA base address [31:25] for AIU input Write 0 when writing. 0 is returned after a read. D[8:0] AIUIBA[24:16] DMA base address [24:16] for AIU input |
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