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VR4102 Datasheet(PDF) 309 Page - NEC |
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VR4102 Datasheet(HTML) 309 Page - NEC |
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309 / 701 page ![]() CHAPTER 14 ICU (INTERRUPT CONTROL UNIT) 309 14.2.13 NMIREG (0x0B00 0098) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved NMIORINT R/W R RR RRR R R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15..1] Reserved Write 0 when writing. 0 is returned after a read. D[0] NMIORINT Low battery detect interrupt type setting 1 : Int0 0 : NMI This register is used to set the type of interrupt used to notify the VR4100 CPU core when a low battery detect interrupt has occurred. |
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