| Electronic Components Datasheet Search |
|
VR4102 Datasheet(PDF) 143 Page - NEC |
|
|
|||||||||||||||||||||||||||||
VR4102 Datasheet(HTML) 143 Page - NEC |
|
143 / 701 page ![]() CHAPTER 5 MEMORY MANAGEMENT SYSTEM 143 Figure 5-11. Format of a TLB Entry (1/2) (a) PageMask Register 18 19 0 31 11 10 0 MASK 0 13 8 11 MASK : Page comparison mask, which determines the virtual page size for the corresponding entry. 0 : Reserved for future use. Write 0 in a write operation. When this field is read, 0 is read. (b) EntryHi Register 39 40 (a) 32-bit mode 8 3 21 0 31 11 10 8 7 VPN2 0 ASID (b) 64-bit mode 62 61 8 3 2 22 29 0 63 11 10 8 7 R Fill VPN2 0 ASID VPN2: Virtual page number divided by two (mapping to two pages) ASID : Address space ID. An 8-bit ASID field that lets multiple processes share the TLB; each process has a distinct mapping of otherwise identical virtual page numbers. R : Space type (00 o user, 01 o supervisor, 11 o kernel). Matches bits 63 and 62 of the virtual address. Fill : Reserved. Ignored on write. When read, returns zero. 0 : Reserved for future use. Write 0 in a write operation. When this field is read, 0 is read. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |