ECE1200 datasheet(18/87 Pages) MICROCHIP

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ECE1200

DS00003093C Draft-page 18

 2018-2021 Microchip Technology Inc.

3.5

Clocks

The following section defines the clocks that are generated and derived.

3.5.1

CLOCK SOURCES

The table defines raw clocks that are either generated externally or via an internal oscillator.

Note 3-1

The SUSCLK input from the Chipset may not be at a valid 32 kHz frequency until some period of

time after the deassertion of RSMRST#. See chipset specification for the actual timing.

Note 3-2

The internal 48 MHz Ring Oscillator acquires a frequency lock referenced to the external 32kHz clock

source. It is not externally presented, but it is the basis of the LPC_CLK outputs when they are

enabled.

3.5.2

GENERATED CLOCK OUTPUTS

This section describes clocks generated by the ECE1200 that may be used by the external system.

3.6

Resets

TABLE 3-3:

SOURCE CLOCK DEFINITIONS

Clock Name

Frequency

Description

Source

SUSCLK

32.768 kHz

32.768 kHz Suspend Well Clock

input.

Used to generate 48MHz internal

clocking, and the 24MHz LPC Clock.

From Host Chipset. Note that this

clock may be running before VTR

voltages are present.

eSPI_CLK

20--50 MHz

eSPI Transfer Clock, asynchronous

to all others. Only runs during active

transfers.

From Host Chipset.

TABLE 3-4:

GENERATED CLOCK DEFINITIONS

Clock Name

Frequency

Description

Source

48 MHz Ring

Oscillator

48 MHz

Multiplied up from 32KHz input

SUSCLK

LPC_CLK[1:0]

24 MHz

System clock outputs for LPC, Serial

IRQ and CLKRUN#

48 MHz Ring Oscillator

TABLE 3-5:

DEFINITION OF RESET SIGNALS

Reset

Description

Source

RESETI#

External Pin that serves as the VTR POR event

when pulsed low. Resets the entire device.

Pin Input

Intended to come from system RSMRST#.

eSPI_RESET#

Reset signal associated with the eSPI interface.

Restarts the eSPI interface if pulsed low. Will be

held low by the system while RESETI#

(RSMRST#) is low, and rises after the rising

edge of RESETI#.

Pin Input

Intended to come from system eSPI_RESET#.

PLTRST#

Platform Reset.

Pin Input

Intended to come from system PLTRST#,

serving also as system LRESET# /

PCI_RESET#.

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