ECE1200 datasheet(54/87 Pages) MICROCHIP

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ECE1200

DS00003093C Draft-page 54

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6.11.4

CLKRUN IDLE CLOCKS REGISTER

6.11.5

SERIRQ ENABLE AND MODE REGISTER

Index

3Dh of Logical Device 01h

Bits

Description

Type

Default

Reset Event

7:2 Number of Idle Clocks

This is the minimum number of clocks after CLKRUN# goes

high before LPC clocks get turned off.

Zero represents the CLKRUN# compliant minimum. (default)

A Non-Zero value increases this time by 4 clocks per unit.

R/W

00h

PLTRST

1 Reserved

0 Reserved.

Index

40h of Logical Device 01h

Bits

Description

Type

Default

Reset Event

7SIRQ_EN

‘1’ = The Serial IRQ feature is enabled. When writing ‘1’ to this

bit initially, it is required to write ‘1’ to the SIRQ_MD bit also.

‘0’ = The Serial IRQ feature is disabled. (default)

R/W

PLTRST

6SIRQ_MD

‘1’ = Serial IRQ is in Continuous Mode.

‘0’ = Serial IRQ is in Quiet Mode. (This is the hardware default,

but it must be overwritten temporarily to ‘1’ when enabling

Serial IRQ.)

R/W

PLTRST

5:2 FORMAT

This field permanently selects the 21-slot format, and is pre-

sented Read-Only for legacy purposes.

0100b

PLTRST

1:0 START_PW

‘00’ = Start Pulse is 4 clocks wide. (default)

‘01’ = Start Pulse is 6 clocks wide.

‘10’ = Start Pulse is 8 clocks wide.

‘11’ = Reserved

R/W

00b

PLTRST

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