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ECE1200 Datasheet(PDF) 51 Page - Microchip Technology

Part # ECE1200
Description  eSPI to LPC Bridge
PDF  87 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ECE1200 Datasheet(HTML) 51 Page - Microchip Technology

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 2018-2021 Microchip Technology Inc.
DS00003093C Draft-page 51
ECE1200
6.10.18
MAP SERIRQ INTD# SLOT REGISTER
6.11
LPC Register Set, Logical Device 01h
Registers in the LPC Register region are used for managing the downstream interfaces: LPC, Serial IRQ and
CLKRUN#. They are shown in the following summary table, according to the INDEX value used to select them. This
region is accessible from INDEX values 30h through FFh while the value 01h is held in the Logical Device Number Reg-
ister.
Index
BBh of Logical Device 00h
Bits
Description
Type
Default
Reset Event
7:0 Programs the eSPI IRQ to be connected to SERIRQ Slot 21.
By default it is disconnected by its initial FFh value, but any IRQ
number recognized by the Chipset may be selected by placing its
number here.
R/W
FFh
PLTRST
TABLE 6-4:
LPC REGISTER SUMMARY
Index
Register Name
30h
Test
31h -- 37h
Reserved
38h
Clock Enable Register
39h
Reserved
3Ah
Reserved
3Bh
Clock Control Lock Register
3Ch
CLKRUN Control Register
3Dh
CLKRUN Idle Clocks Register
3Eh
Test
3Fh
Reserved
40h
SERIRQ Enable and Mode Register
41h -- 54h
Reserved
55h
Inaccessible (INDEX=55h is Enable Configuration Mode code)
56h -- 5Fh
Reserved
60h
Test
61h -- 63h
Reserved
64h
Test
65h
Test
66h
Test
67h
Test
68h
Test
69h
Test
6Ah -- A9h
Reserved
AAh
Inaccessible (INDEX=AAh is Disable Configuration Mode code)
ABh -- EFh
Reserved
F0h
SERIRQ Exception Enables Register
F1h
SERIRQ Clocking Register
F2h
LPC Error Log Non-Posted Register
F3h
LPC Error Log Posted Register
F4h
Error Cycle Address 0 Register



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