ECE1200 datasheet(28/87 Pages) MICROCHIP

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ECE1200

DS00003093C Draft-page 28

 2018-2021 Microchip Technology Inc.

5.5.3

SUSWARN#

This pin restores a pin that may no longer be available on an eSPI-configured Chipset. It presents the state of the Virtual

Wire replacement.

Usage:

This output serves as the PCH-driven request to enter DSW Deep Sleep mode. When configured as the Primary eSPI

Slave, the SUSWARN# pin must be connected to provide a handshake with the SUSACK# pin. This connection may be

direct, or it may involve external circuitry and/or the EC to provide a gating delay, as required by the DSW needs of the

system.

A connection between SUSWARN# and SUSACK# should be considered mandatory regardless of whether DSW Deep

Sleep is being used in the system. Each edge presented on SUSWARN# must be followed by a corresponding edge on

the SUSACK# pin, or else the system may hang and fail to boot.

See Section 1.1.1, "General System Block Diagram," on page 5, and Note 4 below it.

5.5.4

SUSACK#

This input restores a pin that may no longer be available on an eSPI-configured Chipset. Edges on this pin are trans-

mitted as Virtual Wire events to the Chipset.

Usage:

It is intended to accept edges coming ultimately from the SUSWARN# pin. See Section 5.5.3, "SUSWARN#" above.

5.5.5

SUSPWRDNACK / HOST_RST_ACK

This pin is multiplexed by the state of the BOOT_DONE pin. See Section 5.5.2, "BOOT_DONE," on page 27.

5.5.5.1

Primary Slave Role: SUSPWRDNACK

In the Primary Slave role (BOOT_DONE = 1), this pin presents the state of the Virtual Wire SUSPWRDNACK, replacing

a physical signal no longer presented by some eSPI-mode PCH devices. It may be used by the EC or external circuitry

as permission to remove Chipset Primary power for Deep Sleep (Chipset G3 mechanism).

In this role, the HOST_RST_ACK state is transmitted over eSPI as a Virtual Wire, and does not involve a physical signal.

5.5.5.2

Secondary Slave Role: HOST_RST_ACK

This pin is provided to supply optional support for an eSPI-specific handshake (HOST_RST_WARN/HOST_RST_ACK),

which is performed separately by the Primary eSPI Slave (EC or SIO), to grant permission for the Chipset to issue an

LRESET# event. A Secondary Slave cannot respond to this handshake over eSPI directly, though it does see the

HOST_RST_WARN Virtual Wire.

The HOST_RST_ACK pin output goes high in response to the rising edge of Virtual Wire HOST_RST_WARN, delayed

until the LPC and Serial IRQ interfaces have become idle in response. If the Primary Slave can make use of this signal

to delay its own Virtual Wire HOST_RST_ACK response, this signal may be connected to it. Otherwise, this pin may be

left unconnected.

The Virtual Wire SUSPWRDNACK is irrelevant to a Secondary Slave, intended to be processed by the Primary Slave

instead.

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