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ZL30263 Datasheet(PDF) 73 Page - Microchip Technology |
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ZL30263 Datasheet(HTML) 73 Page - Microchip Technology |
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73 / 94 page ![]() ZL30260-ZL30263 Data Sheet 73 © 2021 Microchip Technology Inc. DS20006554A a data signal (phase alignment or time alignment signal that is latched by a POS signal edge) rather than a true clock signal. Bits 1 to 0: Output Clock Stop Mode (MODE[1:0]). This field selects the mode of the start-stop function. See section 5.6.6. 00 = Stop Low: stop after falling edge of output clock, start after rising edge of output clock 01 = Stop High: stop after rising edge of output clock, start after falling edge of output clock 10 = Stop Low then go high-impedance: stop after falling edge, start after rising edge 11 = Stop High then go high-impedance: stop after rising edge, start after falling edge The following table shows which pin(s) stop high or low as specified above for each output signal format: Signal Format OCxCR2.OCSF Pin that Stops As Specified LVDS, LVPECL, Programmable Differential 001 or 010 OCxP HSTL 011 OCxP Two CMOS, OCxP in phase with OCxN 100 OCxP and OCxN One CMOS, OCxN enabled 101 OCxN One CMOS, OCxP enabled 110 OCxP Two CMOS, OCxN inverted vs. OCxP 111 OCxP |
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