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MMPF0100 Datasheet(PDF) 114 Page - NXP Semiconductors

Part # MMPF0100
Description  14 channel configurable power management integrated circuit
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100 Datasheet(HTML) 114 Page - NXP Semiconductors

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114
NXP Semiconductors
PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
D8
OTP VGEN5 VOLT
R/W
8'b0000_xxxx
––
–
–
VGEN5_VOLT[3:0]
0
0
0
0
xxx
x
D9
OTP VGEN5 SEQ
R/W
8'b000x_xxxx
––
–
VGEN5_SEQ[4:0]
0
0
0
x
xxx
x
DC
OTP VGEN6 VOLT
R/W
8'b0000_xxxx
––
–
–
VGEN6_VOLT[3:0]
0
0
0
0
xxx
x
DD
OTP VGEN6 SEQ
R/W
8'b000x_xxxx
––
–
VGEN6_SEQ[4:0]
0
0
0
x
xxx
x
E0
OTP PU CONFIG1
R/W
8'b000x_xxxx
––
–
PWRON_
CFG1
SWDVS_CLK1[1:0]
SEQ_CLK_SPEED1[1:0]
0
0
0
x
xxx
x
E1
OTP PU CONFIG2
R/W
8'b000x_xxxx
––
–
PWRON_
CFG2
SWDVS_CLK2[1:0]
SEQ_CLK_SPEED2[1:0]
0
0
0
x
xxx
x
E2
OTP PU CONFIG3
R/W
8'b000x_xxxx
––
–
PWRON_
CFG3
SWDVS_CLK3[1:0]
SEQ_CLK_SPEED3[1:0]
0
0
0
x
xxx
x
E3
OTP PU CONFIG
XOR
R
8'b000x_xxxx
––
–
PWRON_CFG
_XOR
SWDVS_CLK3_XOR
SEQ_CLK_SPEED_XOR
0
0
0
x
xxx
x
E4 (83)
OTP FUSE POR1
R/W
8'b0000_00x0
TBB_POR
SOFT_FUSE_
POR
––
–
–
FUSE_POR1
–
00
0
0
00
x
0
E5
OTP FUSE POR1
R/W
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR2
–
00
0
0
00
x
0
E6
OTP FUSE POR1
R/W
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR3
–
00
0
0
00
x
0
E7
OTP FUSE POR
XOR
R
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR_X
OR
–
00
0
0
00
x
0
E8
OTP PWRGD EN
R/W/M
8'b0000_000x
––
–
–
–––
OTP_PG_EN
00
0
0
00
x
0
F0
OTP EN ECCO
R/W
8'b000x_xxxx
––
–
EN_ECC_
BANK5
EN_ECC_
BANK4
EN_ECC_
BANK3
EN_ECC_
BANK2
EN_ECC_
BANK1
0
0
0
x
xxx
x
F1
OTP EN ECC1
R/W
8'b000x_xxxx
––
–
EN_ECC_
BANK10
EN_ECC_
BANK9
EN_ECC_
BANK8
EN_ECC_
BANK7
EN_ECC_
BANK6
0
0
0
x
xxx
x
F4
OTP SPARE2_4
R/W
8'b0000_xxxx
––
–
–
RSVD
0
0
0
0
xxx
x
Table 137. Extended page 1 (continued)
Address
Register name
TYPE
Default
BITS[7:0]
7
6
5
4
3
2
1
0



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