MMPF0100 datasheet(125/136 Pages) NXP

125 / 136 page

NXP Semiconductors

125

PF0100

TYPICAL APPLICATIONS

Figure 38. Layout example for buck regulators

7.3

Thermal information

7.3.1

Rating data

The thermal rating data of the packages has been simulated with the results listed in Table 6.

Junction to ambient thermal resistance nomenclature: the JEDEC specification reserves the symbol RθJA or θJA (Theta-JA) strictly for

junction-to-ambient thermal resistance on a 1s test board in natural convection environment. RθJMA or θJMA (Theta-JMA) is used for both

junction-to-ambient on a 2s2p test board in natural convection and for junction-to-ambient with forced convection on both 1s and 2s2p

test boards. It is anticipated the generic name, Theta-JA, continues to be commonly used.

The JEDEC standards can be consulted at http://www.jedec.org.

7.3.2

Estimation of junction temperature

An estimation of the chip junction temperature TJ can be obtained from the equation:

TJ = TA + (RθJA x PD)

with:

TA = Ambient temperature for the package in °C

RθJA = Junction to ambient thermal resistance in °C/W

PD = Power dissipation in the package in W

The junction to ambient thermal resistance is an industry standard value providing a quick and easy estimation of thermal performance.

Unfortunately, there are two values in common usage: the value determined on a single layer board RθJA and the value obtained on a four

layer board RθJMA. Actual application PCBs show a performance close to the simulated four layer board value although this may be

somewhat degraded in case of significant power dissipated by other components placed close to the device.

At a known board temperature, the junction temperature TJ is estimated using the following equation

TJ = TB + (RθJB x PD) with

TB = Board temperature at the package perimeter in °C

RθJB = Junction to board thermal resistance in °C/W

PD = Power dissipation in the package in W

When the heat loss from the package case to the air can be ignored, acceptable predictions of junction temperature can be made.

See 6 Functional block requirements and behaviors, page 18 for more details on thermal management.

MMPF0100 Datasheet(PDF) 125 Page - NXP Semiconductors