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TDP0604 Datasheet(PDF) 42 Page - Texas Instruments |
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TDP0604 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 65 page  Table 8-24. GBL_SLEW_CTRL Register Field Descriptions (continued) Bit Field Type Reset Description 6-4 SLEW_3G R/W 3h Field controls slew rate for HDMI 1.4 data lane. 0h = slowest edge rate 7h = fastest edge rate 3 RESERVED R 0h Reserved 2-0 SLEW_6G R/W 4h Field controls slew rate for HDMI 2.0 data lanes. 0h = slowest edge rate 7h = fastest edge rate 8.6.1.5 GBL_SLEW_CTRL2 Register (Offset = Ch) [Reset = 71h] GBL_SLEW_CTRL2 is shown in GBL_SLEW_CTRL2 Register Field Descriptions. Return to the TDP0604 Registers. Table 8-25. GBL_SLEW_CTRL2 Register Field Descriptions Bit Field Type Reset Description 7 RESERVED R 0h Reserved 6-4 RESERVED R/W 7h Reserved 3 RESERVED R 0h Reserved 2-0 SLEW_CLK R/W 1h Field control slew rate of clock lane. 0h = slowest edge rate 7h = fastest edge rate 8.6.1.6 GBL_CTRL1 Register (Offset = Dh) [Reset = 22h] GBL_CTRL1 is shown in GBL_CTRL1 Register Field Descriptions. Return to the TDP0604 Registers. Table 8-26. GBL_CTRL1 Register Field Descriptions Bit Field Type Reset Description 7 GLOBAL_LINR_EN R/W 0h Global control for selecting between linear redriver or limited redriver. 0h = Limited 1h = Linear 6 TX_AC_EN R/W 0h Controls selection of AC-coupled or DC-coupled TX termination. When AC-coupled is enabled, 50 Ω termination on both P and N to VCC will be enabled. 0h = DC-coupled 1h = AC-coupled 5-4 GLOBAL_DCG R/W 2h CTLE DCGain for all lane. 0h = -3 dB 1h = -3 dB 2h = 0 dB 3h = +1 dB 3 TXTERM_AUTO_HDMI14 R/W 0h Selects between no termination and 300 Ωs when TERM = 2h and operating in HDMI1.4. 0h = No termination for clock less than or equal to 165 MHz and 300 Ω for clock greater than 225 MHz 1h = 300 Ω TDP0604 SLLSFJ8 – DECEMBER 2021 www.ti.com 42 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TDP0604 |
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