TDP0604 datasheet(24/65 Pages) TI

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8.3 Feature Description

8.3.1 4-Level Inputs

The TDP0604 has 4-level inputs pins that are used to control the receiver equalization gain, transmitter voltage

swing, and pre-emphasis, and place TDP0604 into different modes of operation. These 4-level inputs utilize a

resistor divider to help set the 4 valid levels and provide a wider range of control settings. There is an internal

pull-up and a pull-down resistors. These resistors, together with the external resistor connection combine to

achieve the desired voltage level.

Table 8-1. 4-Level Control Pin Settings

LEVEL

SETTINGS

Tie 1-kΩ 5% to GND.

Tie 20-kΩ 5% to GND.

Float (leave pin open)

Tie 1-kΩ 5% to VCC.

Note

Figure 7-1 shows how all 4-level inputs are latched after the rising edge of the EN pin. After these pins

are sampled, the internal pull-up and pull-down resistors will be isolated to save power.

8.3.2 I/O Voltage Level Selection

The TDP0604 supports 1.2-V, 1.8-V, and 3.3-V LVCMOS levels. The VIO pin is used to select which voltage

level is used for the following 2-level control pins: LV_DDC_SDA, LV_DDC_SCL, SCL/CFG0, and SDA/CFG1.

The AC_EN pin threshold is fixed at 3.3-V LVCMOS levels. EN pin threshold is fixed at 1.2-V LVCMOS

threshold.

Table 8-2. Selection of LVCMOS Signaling Level

VIO pin

LVCMOS Signaling Level

VALUE < 1.5-V

1.2-V

1.5-V < VALUE < 2.5-V

1.8-V

VALUE > 2.5-V

3.3-V

8.3.3 HPD_OUT

The TDP0604 will level shift 5 V signalling level present on HPD_IN pin to a lower voltage such as 1.8 V or 3.3

V levels on the HPD_OUT pin. The HPD_OUT supports both push-pull and open drain. The default operation is

push-pull. Selection between push-pull and open drain is done through the HPDOUT_SEL register.

When HPD_OUT is configured for push-pull operation, the output level of HPD_OUT is determined by VIO as

detailed in Table 8-2. Please note push-pull operation is not supported for VIO less than 1.7 V.

Note

Open-drain operation is only supported when TDP0604 is configured for I2C mode.

When EN pin is low, the HPD_OUT pin will be in a high impedance state. It is recommended to have a

weak pull-down resistor (such as 220k) on HPD_OUT.

8.3.4 Lane Control

The TDP0604 has various lane control features. Pin strapping globally controls features like receiver

equalization, VOD swing, slew rate, and pre-emphasis or de-emphasis. Through I2C receiver equalization,

transmitter swing, and pre-emphasis for each lane can be independently controlled.

TDP0604

SLLSFJ8 – DECEMBER 2021

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