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TDP0604 Datasheet(PDF) 8 Page - Texas Instruments |
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TDP0604 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 65 page  6.5 Electrical Characteristics (continued) over recommended voltage and operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIL_1p8V Low-level input voltage for SCL/CFG0, SDA/CFG1 VIO = 1.9V; VCC = 3.0V; -0.3 0.57 V VIH_1p8V High-level input voltage for SCL/CFG0, SDA/CFG1 VIO = 1.7V; VCC = 3.6V; 1.19 3.6 V VIL_3p3V Low-level input voltage for SCL/CFG0, SDA/CFG1 VIO = 3.6V; VCC = 3.0V; -0.3 0.8 V VIL_3p3V Low-level input voltage for AC_EN VIO = 3.6V; VCC = 3.0V; -0.3 0.8 V VIH_3p3V High-level input voltage for SCL/CFG0, SDA/CFG1 VIO = 3.0V; VCC = 3.6V; 2.2 3.6 V VIH_3p3V High-level input voltage for AC_EN, HPDOUT_SEL VIO = 3.0V; VCC = 3.6V; 2.2 3.6 V VOL_1p2V Low-level output voltage SDA/CFG1 VCC = 3.0V; VIO = 1.2-V; -0.3 0.3 V IOL_1p2V Low-level output current SDA/CFG1 VCC = 3.0V; VIO = 1.2-V; 2 mA VOL Low-level output voltage SDA/CFG1 VCC = 3.0V; VIO = 1.8V or 3.3V; -0.3 0.4 V IOL Low-level output current SDA/CFG1 VCC = 3.0V; VIO = 1.8V or 3.3V; 4 mA IIL_I2C Low-level input current SCL/CFG0, SDA/ CFG1 VIN = 0V; VIO = 1.8V or 3.3V; –1 1 µA ILEAK Fail-safe input current for SCL/CFG0, SDA/CFG1 VIN = 3.6V; VCC = 0V; –25 25 µA VIL_EN Low-level input voltage for EN pin. VIO = 1.14V; VCC = 3.3V; -0.3 0.4 V VIH_EN High-level input voltage for EN pin. VIO = 3.6V; VCC = 3.3V; 0.8 3.6 V IIL Low-level input current EN VIN = 0V; VIO = 1.8V or 3.3V; VCC = 3.6V –20 20 µA IIL Low-level input current AC_EN VIN = 0V; VIO = 1.8V or 3.3V; –1 1 µA IIH_EN High-level input current for EN VIN = 3.6V; VIO = 1.8V or 3.3V; –1 1 µA IIH_ACEN High-level input current for AC_EN VIN = 3.6V; VIO = 1.8V or 3.3V; –24 24 µA IIH_HPDOU TSEL High-level input current for HPDOUT_SEL VIN = 3.6V; VIO = 1.8V or 3.3V; –24 30 µA RPU_EN Internal Pull-up resistance on EN. 125 250 350 kΩ RPD_ACE N Internal Pull-down resistance on AC_EN 125 250 350 kΩ RPD_HPD OUTSEL Internal Pull-down resistance on HPDOUT_SEL 125 250 350 kΩ CI2C-PINS Capacitance for SCL/CFG0 and SDA/ CFG1 f = 100 kHz; 5 pF C(I2C_FM+ _BUS) I2C bus capacitance for FM+ (1MHz) 150 pF C(I2C_FM_ BUS) I2C bus capacitance for FM (400kHz) 150 pF R(EXT_I2C _FM+) External resistors on both SDA and SCL when operating at FM+ (1MHz) C(I2C_FM+_BUS) = 150 pF 620 820 910 Ω R(EXT_I2C _FM) External resistors on both SDA and SCL when operating at FM (400kHz) C(I2C_FM_BUS) = 150 pF 620 1500 2200 Ω LV_DDC_SDA and LV_DDC_SCL VIL_1p2V Low-level input voltage VCC = 3.0V; -0.3 0.378 V VIH_1p2V High-level input voltage VCC = 3.6V; 0.8 3.6 V VIL_1p8V Low-level input voltage VCC = 3.0V; -0.3 0.57 V VIH_1p8V High-level input voltage VCC = 3.6V; 1.19 3.6 V VIL_3p3V Low-level input voltage VCC = 3.0V; -0.3 0.8 V VIH_3p3V High-level input voltage VCC = 3.6V; 2.2 3.6 V TDP0604 SLLSFJ8 – DECEMBER 2021 www.ti.com 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TDP0604 |
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